F28M35H52C: ADC accuracy

Hi Tommy,
Thanks for pointing me to the thread. Customer is going to run some tests.

I have a side question about detecting external clock drift in the F28M35H52. customer was planning to use a Watchdog timer but realized that its only able to detect a stuck CPU and not capable of controlling the frequency. For UL1998 they need to detect wrong clock frequency, is there a solution to detect clock variation that isn't very expensive?

Regards,
Dmitry

Dmitry,

I am not very familiar with the UL1998 requirements. Can you provide some details of what is needed?

If it is a matter of confirming the PLL frequency, it should be possible to compare the input clock vs SYSCLK by measuring the ratio of decrement speed between say TIMER0 and TIMER2.

If it is a matter of confirming the input clock, I think you would need an independent clock reference and use something like eCAP to measure the frequency.

-Tommy

Tommy,

They use an external oscillator for the CPU clock. There's a requirement to verify if the clock drifts (for examples 2Mhz t o1.8Mhz) and they need a method to detect and reset the DSP. they tried using a watchdog timer but it has wide window and is not suitable here.

They are thinking to generate ISR and toggle a port and have an arrangement (H/W) to reset the micro if the port toggle frequency changes. right now, most of their discreet circuit use caps which puts 20% error over the lifetime. So that's why they need an alternative approach, possibly a dedicated IC which is meant for this purpose or anything else that can accomplish this task. Do you think eCap module is the best approach here or they need an actual external clock generator?

Regards,

Dmitry

Dmitry,

It sounds like they are wanting to use the F28M35H52C to monitor its own clock source. Is my understanding correct?

Self-monitoring in the digital domain will not be possible without an additional reference clock. For example, the eCAP module is designed to use SYSCLK as a reference for measuring time duration. If the clock input to F28M35H52C begins to drift, SYSCLK and eCAP would also drift by a proportional amount. The result would be no discernible change in the eCAP measurements. With an independent reference clock to measure, eCAP would be able to detect a drift between the external clock vs SYSCLK.

It would be possible to use the ePWM to output a fixed switching frequency into an RC integrator and measure the voltage using the ADC or comparator, but the R and C would both be prone to the same drift as the other capacitors in the system so this probably does not help either.

An external supervisor IC can detect drift by monitoring a fixed clock output from F28M35H52C. This would essentially be adding another reference clock that is embedded in the supervisor IC.

-Tommy

Tommy,

Understood, thanks for clearing it up for me.

Do you think something like LMK61E2 would be the best option to go here ? What do you typically see customers use in this situation?

Regards,

Dmitry

Dmitry,

This particular question has not been posed to me before. However, I am not a safety expert so these questions are probably routed to others. I will ask a colleague if he has any prior experience.

As far as a reference clock goes, it does not need to be anything with high performance. The LMK61E2 looks like it would be beyond what is necessary in price and performance. I would recommend something that is much slower than SYSCLK like a cheap 10MHz oscillator. You could even use a periodic output from another device on the board that uses a separate clock source.

-Tommy