This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F28374D: CPU2 issue when debugging : working not properly first time after power on ( just in debug ) , device stdalone always fine

Part Number: TMS320F28374D
Other Parts Discussed in Thread: CONTROLSUITE, C2000WARE

HI everybody , 

I have been coding and debugging on dual core since many months no issue at all .  I am on CCS8.2 and latest  libs .      

now I got a "strange" issue  I do not understand  .

when  debugging  code ( code is in flash ) for first time  after  power on   CPU2  starts in a wrong way ( cputimer1 seems not starting at all even if code is runnig -->I can pause code , play again  but no way  , task using cputimer not running  ) . only way to solve this issue is  to reset and restart at least  twice CPU2  and from that on everything is fine...    please consider  CPU1 is working alll the times no issue .

please consider :

- device stand alone ( no emulator connected )  -->  device is working fine  100%  on every single power on

- this issue popped up after I reserved  more RAM to CPU2 ( default not enough for me ) .  and  1xADC ,1xUART and 1xSPI  to core 2 

( if needed I can share code offline )   :  could I have done something wrong ?  what to check ?

questions:

- do you have a working code  example in flash  with   dedicated resources and more memory  to CPU2  I can  cross check  ?

-what could be the root cause to double check ? 

any suggestion is welcome 

thank you 

regards

Carlo

  • Carlo,

    Do you have IPC communication between the cores to make sure that CPU2 executes the code from shared RAM only after CPU1 configures the clock and shared RAM ownership?

    What is the wait-state configuration that you are using for Flash on your CPU2?

    Thanks and regards,
    Vamsi
  • IPC n memory settings.docxHI Vamsi ,

    in attach  do with settings and configuration .

    please  do you have an example  similar to mine  ( so using GSram and out of flash )  I can double check on my side ?

    about settings  to me they look OK , plus how could they be the issue  since staldone device flashed work fine 100% of times .

    thank you 

    regrards

    Carlo

  • Carlo,

    I saw your Flash initialization and it looks ok.
    Did you check the RAM management example (controlSUITE\device_support\f28m35x\v220\F28M35x_examples_Dual\RAM_management)?

    In the linker cmd snap that you shared, I can see that GSxRAM is used, but I can't tell whether it is allocated to CPU2 properly or not (meaning, whether proper IPC sync is established between the two cores or not, to make sure that CPU2 uses SharedRAM only after CPU1 gives the ownership. Above example can help in that.).

    Things to check regarding debugger vs standalone:
    (1) May be your debugger scenario is not executing M3 first? Do your run M3 first and then C28x in debugger acase as well?
    (2) In the debugger case, when you see this issue happening, did you try to check whether the intended code (timer) is present in the memory or not?
    (3) Are you executing the timer ISR from Flash or RAM? If RAM, did you make sure to do the memcpy() correctly?
    (4) Debugger's gel file does RAM initialization (to Zeros) on target connect. Did you check if this has any role? I hope this is not the issue, since zeroing out the RAM will cause ITRAPs when you fetch. But, is there any RAM data that can affect the timer behavior in your application? Can zeroing the data affect it? Please analyze. I understand it is in target connect - but I don't know your debug flow and hence wanted to bring this to your attention, just in case.

    Thanks and regards,
    Vamsi
  • Hi Vamsi , 

    I shared you init offline , please codul yo ucheck ? 

    in you message about debugger   you are talking on M3  ?  coudl you clarify this ?  Im on F28374D

    regards

    Carlo

  • Carlo,

    Sorry for the confusion, I read your post and meanwhile I had to help another Concerto customer. Coming back from that discussion, I mentioned M3 by mistake.

    However, the discussion is in the right direction. Just replace M3 with C28x CPU1.

    RAM management example is at C2000Ware_x_xx_xx_xx\device_support\f2837xd\examples\dual\RAM_management.

    I have a question based on the code that you sent offline:
    Do they execute IPCBootCPU2(C1C2_BROM_BOOTMODE_BOOT_FROM_FLASH) in debugger case? They should not. If they execute this function, CPU2 will start executing whatever is there in Flash.

    You should first connect both cores, load code to both cores, then execute CPU1 first and then execute CPU2.

    Thanks and regards,
    Vamsi
  • Hi Vamsi ,
    IPCboot... is not executed in debug mode .
    we tested your suggested procedure and it is not working : exactly same issue .
    please same set up , same hw , less code on CPU2 everything is working fine .
    any idea ?
    best regards
    Carlo
  • Hi Vamsi ,
    some more details we collected :
    - we are using blackhwack2000
    -there is a LED running using CPU2 timer0 .
    when we have first power on issue , we checked with the emulator and TIMER0 in cpu2 is not properly set despite right coding . it looks like some peirpherals ( inclduing cputimer0 ) are resetted despite proper code .
    we break the code , set with the emulator the CPUtimer0 interrupt and now it works but period is wrong confirming for whatever reason the code not properly exectued
    it looks like in CPU2 there is some kind of reset ongoing resetting peripherals
    thank you
    regards
    Carlo
  • Carlo,

    Do you have watchdog enabled? If yes, is it serviced at regular intervals as needed?

    Thanks and regards,
    Vamsi
  • Hi Vamsi ,
    the tested with and wthout but no success .
    Carlo
  • This is getting looked off-line.

    Regards,
    Vivek Singh