Tool/software: Code Composer Studio
I'm performing BIST on my F28335 with STL library and the Watchdog self test modifies the configuration of the watchdog to Watchdog Interrupt Mode.
Since BIST is executed after previous configuration, I need to preserve and restore all registers modified by the STL WD Self-Test: SCSR and WDR.
After WD Self-Test, the SCSR register is read as:
- WDINTS -> 0 (Watchdog interrupt signal (WDINT) is active)
- WDENINT -> 1 (The WDRST output signal is disabled and the WDINT output signal is enabled)
- WDOVERRIDE -> 1 (Enable change of state of the watchdog disable (WDDIS) bit in the watchdog control (WDCR))
And the WDCR register is read as:
- WDFLAG -> 0 (No watchdog reset)
- WDDIS -> 1 (Watchdog disabled)
- WDCHK -> 0,0,0 (always reads 000)
- WDPS -> 0,0,0 (Watchdog pre-scale default)
According to documentation, if I clear WDENINT while WDINTS is low, the device will reset immediately. WDINTS should be low only for 512 OSCCLK cycles then it should be set to 1. I'm polling its value to change clear WDENINT, but still after clearing it, the device enters in a continues reset loop.
What I'm doing is the following:
EALLOW;
SysCtrlRegs.WDKEY = 0x0055U; //Reset WD counter
SysCtrlRegs.WDKEY = 0x00AAU; //Reset WD counter
SysCtrlRegs.WDCR = 0x28u; //Enable WD
while ((SysCtrlRegs.SCSR & WDINTS_MASK) == 0u){ //Poll WDINTS to clear WDENINT
SysCtrlRegs.WDKEY = 0x0055U; //Reset WD counter
SysCtrlRegs.WDKEY = 0x00AAU; //Reset WD counter
} //WDINTS set high
SysCtrlRegs.SCSR = 0u; //Clear WDENINT to select WD reset mode ( bit 0 ignores write 0, all other bits are read only)
SysCtrlRegs.WDCR = 0x68u; //Disable WD
SysCtrlRegs.WDKEY = 0x0055U; //Reset WD counter
SysCtrlRegs.WDKEY = 0x00AAU; //Reset WD counter
if ((SysCtrlRegs.WDCR & WDFLAG_MASK) != 0u){ //Clear WD Flag only if it was set
SysCtrlRegs.WDCR = SysCtrlRegs.WDCR | WDFLAG_MASK | WDCHK_PASS;
}
EDIS;
I can't completely trust the debugger since stepping disables WD count-up.
The device keeps restarting after I do this.
Any idea?
Thanks.
