CCS/TMS320F28335: ADC and epwm interrupts

Part Number: TMS320F28335
Other Parts Discussed in Thread: C2000WARE

Tool/software: Code Composer Studio

Dear Sir,

I have written a code to read adc samples using Epwm1 start of conversion when adc interrupt occurs and I want to utilize these values in epwminterrupt ISR. But the Adc is not showing any values, but both the ISRs are executing. Please suggest any corrections to the code attached.

#include "DSP28x_Project.h"     // Device Header file and Examples Include File
#include<IQmathLib.h>
#include<math.h>


void InitEPwm1Example(void);
void Gpio_setup1(void);


float summ=0.0f;


float PI=2.0f*3.141592f;
float input1, sin_out1,input2, sin_out2;
long GlobalQ=GLOBAL_Q;
float a1,b1,c1,a2,b2,c2;float theta=0.0f;//float deltheta=0.31415926f;
//float deltheta=(float)(1.8f*PI/180);
//float deltheta=0.031415f; \\for 10khz
float deltheta=0.015707f;float phase=0.0f;float m=0.9f;
float v1[400];Uint16 count=0;float v2[400];
int prestate=0;float d1[400];
int postate=0;

float dqgain=0.816496f;
float ggain=0.707106f;
float Vm=0.15f;float offtrim=1.4434f;

float a[10];
long b[10];
float Vact,Iact;
float Iaref,VDref,VQref,VZref, VgD,VgQ,VgZ;
float ukD,ukQ,ukZ,ukIg;
//
// Function Prototypes
//
__interrupt void adc_isr(void);
__interrupt void ePWM1A_compare_isr(void);


Uint16 LoopCount;
Uint16 ConversionCount;
Uint16 Voltage1[400];
Uint16 current[400];
//
// Main
//
void main(void)
{

    InitSysCtrl();
    EALLOW;
    #if (CPU_FRQ_150MHZ)     // Default - 150 MHz SYSCLKOUT
    //
    // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 150/(2*3)   = 25.0 MHz
    //
        #define ADC_MODCLK 0x3
    #endif
    #if (CPU_FRQ_100MHZ)
    //
    // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 100/(2*2)   = 25.0 MHz
    //
        #define ADC_MODCLK 0x2
    #endif
        EDIS;

        EALLOW;
        SysCtrlRegs.HISPCP.all = ADC_MODCLK;
        EDIS;
    DINT;
    InitPieCtrl();

    IER = 0x0000;
    IFR = 0x0000;

    InitPieVectTable();

    EALLOW;         // This is needed to write to EALLOW protected registers
    PieVectTable.EPWM1_INT = &ePWM1A_compare_isr;
    PieVectTable.ADCINT = &adc_isr;
    EDIS;    // This is needed to disable write to EALLOW protected registers

    Gpio_setup1();
    InitEPwm1Example();

    AdcRegs.ADCMAXCONV.all = 0x0001;       // Setup 2 conv's on SEQ1
    AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x3; // Setup ADCINA3 as 1st SEQ1 conv.
    AdcRegs.ADCCHSELSEQ1.bit.CONV01 = 0x2; // Setup ADCINA2 as 2nd SEQ1 conv.
    AdcRegs.ADCTRL2.bit.EPWM_SOCA_SEQ1 = 1;
    AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 = 1;  // Enable SEQ1 interrupt (every EOS)
    PieCtrlRegs.PIEIER1.bit.INTx6 = 1;
    PieCtrlRegs.PIEIER3.bit.INTx1 = 1;
    IER |= (4|1);

    EINT;           // Enable Global interrupt INTM
    ERTM;           // Enable Global realtime interrupt DBGM

    for(;;);
}


void Gpio_setup1(void){
    EALLOW;
    GpioCtrlRegs.GPAPUD.bit.GPIO0 = 0;   // Enable pullup on GPIO0
    GpioCtrlRegs.GPAPUD.bit.GPIO1 = 0;   // Enable pullup on GPIO1
    GpioCtrlRegs.GPAPUD.bit.GPIO2 = 0;   // Enable pullup on GPIO2
    GpioCtrlRegs.GPAPUD.bit.GPIO3 = 0;   // Enable pullup on GPIO3
    GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 1;  // GPIO0 = PWM1A
    GpioCtrlRegs.GPAMUX1.bit.GPIO1 = 1;  // GPIO1 = PWM1B
    GpioCtrlRegs.GPAMUX1.bit.GPIO2 = 1;  // GPIO2 = PWM2A
    GpioCtrlRegs.GPAMUX1.bit.GPIO3 = 1;  // GPIO3 = PWM2B
    GpioCtrlRegs.GPADIR.bit.GPIO24=0;
    GpioCtrlRegs.GPAMUX2.bit.GPIO24=0;
    GpioCtrlRegs.GPAPUD.bit.GPIO24=0;
    GpioCtrlRegs.GPAQSEL2.bit.GPIO24=0;
    GpioCtrlRegs.GPBMUX1.bit.GPIO32 = 0;
    GpioCtrlRegs.GPBDIR.bit.GPIO32 = 1;
    EDIS;

}
void
InitEPwm1Example()
{
    //
    // Setup TBCLK
    //
    //EPWM1 A and B are GPIO 0 and 1
    EPwm1Regs.TBCTL.bit.CTRMODE = 2; // Count up down
    EPwm1Regs.TBPRD = 1875;       // Set timer period
    EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE;    // Disable phase loading
    EPwm1Regs.TBPHS.half.TBPHS = 0x0000;       // Phase is 0
    EPwm1Regs.TBCTR = 0x0000;                  // Clear counter
    EPwm1Regs.TBCTL.bit.HSPCLKDIV = 001;   // Clock ratio to SYSCLKOUT
    EPwm1Regs.TBCTL.bit.CLKDIV = 000;
    EPwm1Regs.TBCTL.bit.SYNCOSEL=1;
    EPwm1Regs.CMPA.half.CMPA =937;    // Set compare A value
    EPwm1Regs.CMPB = 937;              // Set Compare B value
    EPwm1Regs.DBCTL.bit.OUT_MODE=3;
    EPwm1Regs.DBCTL.bit.POLSEL=2;
    EPwm1Regs.DBCTL.bit.IN_MODE=0;
    EPwm1Regs.DBRED=20;
    EPwm1Regs.DBFED=20;
    EPwm1Regs.AQCTLA.bit.CAU=2;    // Set PWM1A on Zero
    EPwm1Regs.AQCTLA.bit.CAD=1;
    EPwm1Regs.AQCTLB.bit.CBU=2;
    EPwm1Regs.AQCTLB.bit.CBD=1;
    EPwm1Regs.ETSEL.bit.INTEN=1;
    EPwm1Regs.ETSEL.bit.INTSEL=1;
    EPwm1Regs.ETPS.bit.INTPRD=1;
    EPwm1Regs.ETSEL.bit.SOCAEN = 1;     // Enable SOC on A group
    EPwm1Regs.ETSEL.bit.SOCASEL = 4;    // Select SOC from from CPMA on upcount
    EPwm1Regs.ETPS.bit.SOCAPRD = 1;     // Generate pulse on 1st event

    EPwm2Regs.TBCTL.bit.CTRMODE = 2; // Count up down
    EPwm2Regs.TBPRD = 1875;       // Set timer period
    EPwm2Regs.TBCTL.bit.PHSEN = TB_DISABLE;    // Disable phase loading
    EPwm2Regs.TBPHS.half.TBPHS = 0x0000;       // Phase is 0
    EPwm2Regs.TBCTR = 0x0000;                  // Clear counter
    EPwm2Regs.TBCTL.bit.HSPCLKDIV = 001;   // Clock ratio to SYSCLKOUT
    EPwm2Regs.TBCTL.bit.CLKDIV = 000;
    EPwm2Regs.TBCTL.bit.SYNCOSEL=1;
    EPwm2Regs.CMPA.half.CMPA =937;    // Set compare A value
    EPwm2Regs.CMPB = 937;              // Set Compare B value
    EPwm2Regs.DBCTL.bit.OUT_MODE=3;
    EPwm2Regs.DBCTL.bit.POLSEL=2;
    EPwm2Regs.DBCTL.bit.IN_MODE=0;
    EPwm2Regs.DBRED=20;
    EPwm2Regs.DBFED=20;
    EPwm2Regs.AQCTLA.bit.CAU=2;    // Set PWM1A on Zero
    EPwm2Regs.AQCTLA.bit.CAD=1;
    EPwm2Regs.AQCTLB.bit.CBU=2;
    EPwm2Regs.AQCTLB.bit.CBD=1;
}
__interrupt void ePWM1A_compare_isr(void)
{
        postate=GpioDataRegs.GPADAT.bit.GPIO24;

        if (postate>prestate){
            v2[count]=1;
            theta=0.0f;
            GpioDataRegs.GPBTOGGLE.bit.GPIO32 = 1;
        }

        prestate=postate;

        
        m=Voltage1[ConversionCount];

        b1=0.5f+(m-0.5f)*sin(theta);
        b2=0.5f+(m-0.5f)*sin(theta+3.141592f);
        EPwm1Regs.CMPA.half.CMPA =EPwm1Regs.TBPRD-(Uint16)(b1*EPwm1Regs.TBPRD);    // Set compare A value
        EPwm1Regs.CMPB = EPwm1Regs.TBPRD-(Uint16)(b1*EPwm1Regs.TBPRD);               // Set Compare B value
        EPwm2Regs.CMPA.half.CMPA =EPwm1Regs.TBPRD-(Uint16)(b2*EPwm1Regs.TBPRD);     // Set compare A value
        EPwm2Regs.CMPB = EPwm1Regs.TBPRD-(Uint16)(b2*EPwm1Regs.TBPRD);              // Set Compare B value
        v1[count]=EPwm1Regs.CMPA.half.CMPA;
        //v2[count]=EPwm2Regs.CMPA.half.CMPA;
                // v1[count]=b;*/
            //EPwm1Regs.CMPA.half.CMPA=EPwm1Regs.TBPRD-_IQsat(_IQ28mpy(b,EPwm1Regs.TBPRD),EPwm1Regs.TBPRD,0);
           // v1[count]=b;
        count=count+1;
        theta=theta+deltheta;
        if (theta>PI){
            count=0;
            theta=0.0f;
        }
        d1[count]=b1;
    EPwm1Regs.ETCLR.bit.INT=1;
    PieCtrlRegs.PIEACK.all=4;
    //
    // Acknowledge this interrupt to receive more interrupts from group 1
    //
    //PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
    return;
}
__interrupt void adc_isr(void)
{
    Voltage1[ConversionCount] = AdcRegs.ADCRESULT0 >>4;
    current[ConversionCount] = AdcRegs.ADCRESULT1 >>4;
    a[ConversionCount]=(float) (Voltage1[ConversionCount]*0.000732600f); //gain is 3/4095
    b[ConversionCount]=(float) (current[ConversionCount]*0.000732600f); //gain is 3/4095
    Vact=a[ConversionCount]-1.4434f;
    Iact=b[ConversionCount]-1.4434f;
    if(ConversionCount == 400)
    {
        ConversionCount = 0;
        summ=0.0f;
    }
    else
    {
        ConversionCount++;
    }

    AdcRegs.ADCTRL2.bit.RST_SEQ1 = 1;         // Reset SEQ1
    AdcRegs.ADCST.bit.INT_SEQ1_CLR = 1;       // Clear INT SEQ1 bit
    PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;   // Acknowledge interrupt to PIE

    return;
}