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CCS/TMS320F28035: Problem caused by EPWM sub modules Configuration Order

Part Number: TMS320F28035

Tool/software: Code Composer Studio

Hi Expert,

Customer met a EPWM wave loss problem shown as the below figure.

# when configure the all sub modules(TB, CC, AQ, DB. TZ) of EPWM1, then configure EPWM2's, after clear TZ trip flag, the EPWM will lost one pulse(the yellow wave)

# when configure by sub modules, such as first configure TB of all EPWMs, then CC... the EPWM output wave is normal after clear TZ trip.

We wonder if the EPWM sub modules sequence will influence the EPWM output results, and why?

Thanks!  

  • Hi,

    The below attached is the EPWM configurations which could cause pulse loss.

    Could you give me advice on this issue? Thanks!

    EPWM configurations.docx

  • Rayna,

    this sounds like a startup configuration issue. I believe that the reason you are having an unexpected output is because the device is starting in a different state.

    It does NOT matter what order you configure the sub modules of the PWM the PWM should operate the same. What could happen though is if you enable one feature before another it is possible you to have put the PWM in an unknown state at startup. For example maybe you tripped a PWM and the trip wont be cleared until the end of the period.

    Regards,
    Cody 

  • Rayna,
    Has this been resolved?

    Regards,
    Cody
  • Hi Cody,

    Thanks for reminding. After confirm with customer, they said that when clear the TZ trip in the main loop, the ISRs in CLA have already executed which could change the CMP, PRD. However they set a duty limit range to make sure the duty would not drop to 0%.

    ---"For example maybe you tripped a PWM and the trip wont be cleared until the end of the period."
    I'm not quite understand this condition, could you explain more details for me?
    Thanks!

    Because this issue not always occurs, customer would like to catch the CMP, PRD value of EPWM when clear TZ trip to see if the value is abnormal at that moment.
    By the way, do you have some suggestion on the debug method?

    Thanks!
    -Rayna
  • Hi Cody,

    Sorry for the mistake, the chip is based on F280049 not F28035. Thanks!

    -Rayna
  • Rayna,

    --- said:
    Rayna

    The fact that the PWM goes low for only one period makes me think a CBC trip may have taken place(this will trip the PWM for 1 PWM period). There are may other reasons why this could have happened as well, for example if the compare registers were configured incorrectly.

    To debug the CMP and PRD values I think you would want to look when the Trip occurs. For this you could setup the TZ interrupt EPWMx_TZINT.

    If you really want to look at the values when the TZ is being cleared, in OSHT mode simply read and store the counter values before clearing the trip in your code. In CBC mode read and store the values just before the end of the period.


    Regards,
    Cody

  • Hi Cody,

    Thanks for you suggestions.

    Actually, customer only uses OST trip, and "(*ePWM[i]).TZCLR.all = 0x0003;" just copied from old codes which is useless and not influence the OST trip function.

    For the CMP & PRD is keep changing in the ISR, as your suggestion, I think it would be better to read their values before clearing the trip.

    Best Regards
    - Rayna
  • Hi Cody,

    Except the CMP, PRD value, what other aspects do you suggest that we need to debug for this issue?

    Thanks!
    -Rayna
  • Rayna,

    What parts of the PWM module are they using? Many parts of the PWM could cause issues similar to this. For example if they configured the dead band incorrectly it could also force the PWM low.


    Regards,
    Cody 

  • Rayna,

    has this issue been resolved? Is the customer actively pushing this issue?

    Please let me know if I can close this thread.

    Regards,
    Cody 

  • Hi Cody,

    Customer has no time to do this test recently. Please close this thread, I will create a new one if any update.

    Thanks!

    -Rayna