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Original question:

F28377D EMIF using EM1WAIT

TMS320F28377D: EMIF read times using extended wait-state pin

David M. Alter
Guru 61235 points

Part Number: TMS320F28377D

I'm looking in the F28377D datasheet SPRS880K, Table 5-38.  If shows the equation for tc(EMRCYCLE) when hardware wait-states are in use:

I'm not following this EWC*16 portion.  The related thread that this post is based on, and also this thread here https://e2e.ti.com/support/microcontrollers/c2000/f/171/p/783573/2915602 indicates that it is the max timeout counter for extended wait.  Why are we using this in the timings?

If I ignor the timeout counter, what is the normal tc(EMRCYCLE) time?  Is it (RS+RST+RH+2)*E + tw(EM_WAIT)?

Thank you,

David

  • 0
    TI__Guru** 117331 points

    Hi David,

    In case wait signal does not get de-asserted then read cycle will extend til timeout but I see your point. It should be included in max number only and not in min. I'll discuss this and make appropriate changes if needed.

     If I ignore the timeout counter, what is the normal tc(EMRCYCLE) time?  Is it (RS+RST+RH+2)*E + tw(EM_WAIT)?

    That is correct.

    Regards,

    Vivek Singh

  • 0 in reply to Vivek Singh
    TI__Guru 61235 points

    Thank you for the quick response, Vivek.

    I think the EM_WAIT signal is gated to the EMIF clock (e.g., 5 ns) so the equation I gave is not really exact.  There are setup and hold timing requirements on EM_WAIT.

    Regards,

    David