Tool/software: TI-RTOS
Hi,
I have some questions about buses.
www.ti.com/.../tms320f28335.pdf In the 4p of the document, there is only Memory bus and DMA bus.
However, harvard architecture has an address bus and a data bus.
1. Should I assume that both address and data bus exist in the memory bus?
2. When i look at the technical documentation (http://www.ti.com/lit/an/spra820/spra820.pdf), the terms data write address bus, data read address bus are used, which means both address and data bus?
I ask you a detailed explanation because the terms are confusing
Regards,
Han
