CCS/TMS320F28035: SCI TX RX Interrupt without FIFO

Yavuz,

For SCI examples, please see:

C:\ti\c2000\C2000Ware_<version>\device_support\f2803x\examples\c28\ <SCI examples>

The FIFO enhancements are only available if SCIFFENA (bit 14) in the SCIFFTX register is set.  If you want to use the FIFOs for TX but not RX, then adjust the receive FIFO interrupt level RXFFIL (bits 4-0) in the SCIFFRX register.

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- Ken

Lookat the picture,

if I want to use RX int without FIFO, I should close the RXFFIRNA, RXERRINTENA and SCIFFENA bit in their registers. I carried out to complete RX interrupt without FIFO doing this