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Hi, we are realizing the control of a Phase Shifted inverter supplied by a Bilevel Boost PFC unit where the two controls are managed simultaneously by a DSP type TMS320F28235. The problem we found is related to the Boost control. In particular we want to implement a Cycle by Cycle current control in order to limit the current absorbed by the line and keep it at a constant value established by a comparator placed on the reading of the circulating current on the Boost inductance. To do this, the comparator output has been connected to a TZ pin so that the Boost control stop occurs in Hardware mode. The software has been configured so that once the TZFLG is monitored and given its intervention, we wait for the status reading of the same pin to say that the current is returned below the intervention threshold level. At this point the software will do the TZCLEAR in order to allow the Boost command to restart. The controls of the pin status of the current signal and the restart of the TZ are made within the Boost interrupt with a frequency of 50 kHz. What is expected is that the restart of the boost is immediate so that there is no discontinuity on the control: in practice what is obtained is that the command of the Boost remains blocked for about 750useconds before restarting with an impulse that retries the trigger of the current comparator and the subsequent block by the TZ (the sequence is always repeated in the same way). We have had the opportunity to try a similar protection also on the control of the inverter and the result is always to have this delay of about 750useconds on the restart of the power controls.
For information the CBC TZ was used but also the One Shot was tested with the same result. We wanted to know if there is something wrong with our use of the TZ function or otherwise we want to have have advices on how to implement the Current Limt Cycle by Cycle function correctly.
Hi Marchetti,
I am trying to understand the way you implemented. Do you just set only one threshold as the compare reference? So once you hit it(TZFLG triggered), you turn PWM off? And then wait until it goes across the same threshold from the reverse direction to clear the Flag and turn PWM on?
Regards,
Chen
Hi Chen,
I confirm that the comparator has just only one threshold and the PWMs go low when the TZ pin goes LOW.. When the current signal goes back trough this threshold (and TZ pin goes High) the software SET the TZCLR to restart PWMs but they wait for 750useconds to restart.
The TZ pin during this delay time remail HIGH.
I don't know why PWMs don't restart immediately as we have needed.
Thank you for your reply.
Regards
We're looking for some your advices about this problem.
I'd like to inform you that we're using Trip Zone Software Forcing to Stop PWMs when we need to block the power (TZFRC is setting to obtain this function).
This setting isn't executed during current limitation so I think that there aren't conflictual problems between external TZ and Software TZ.
Best reagrds
Hi Marchetti,
I think the best way to implement the cycle by cycle current limit is to use the trip zone plus the action qualifier submodules. You can use the TZ pin and cycle by cycle feature to turn on/off the PWM once you hit the threshold. Then when the counter equals to zero(assuming you are using up-down count mode), you set the action qualifier to turn off/on the PWM. And because of cycle by cycle settings, the trip latch is cleared and the action will be decided by the action qualifier. This should be easier to implement compared with using the software based way to detect flag change and use software force signal.
Regards,
Chen
Hi Chen,
I want to tell you what we are doing on software that doesn't work as we need.
PWM3 settings:
TBCTL3 = 0x0046 counter UP/DOWN;
AQCTLA3 = 0x0090 PWM3A setting
AQCTLB3 = 0x0600 PWM3B setting
TZSEL3 = 0x0200 TZ2 as one shot event (we tried also TZSEL3 = 0x0002 as CBC trip event but with the same result)
These actions are done during initialization (just one time)
Inside the subroutine of End of conversion relative to PWM3 the Trip Zone action is monitored with this C code:
ONE Shot example:
if ((TZFLG3 & 0x0004) && (TZ pin status is returned to high level))
{
EALLOW;
TZCLR3 |= 0x0004;
EDIS;
}
We expected PWM restart immediately but there is a 750useconds delay as we said in the last email.
We ask you if you can explain with an example how to set action qualifier register in particular if it 's neccessary use AQSFRC or AQCSFRC to obtain what you adviced us.
Best regards
Hi Marchetti,
I don't know exactly why it takes 750u seconds in your case. It can be some software settings that we can further take a look at later if you still would like to stick to your original configuration.
But just want to showcase some examples, you can take a look at the cycle by cycle code.
in ti\c2000\C2000Ware\device_support\f2823x\examples\epwm_trip_zone
What I suggest is to realize some configuration for PCMC buck as the pic shown in the link below. You case might be different.
CCS/TMS320F28377D: How to control a Peak Current Mode Controlled Buck converter using CMPSS in TMS320F28377D...
Also we have a PCMC based PSFB reference design that use the cycle by cycle trip and single threshold. It is inside the controlSUITE. Although this is not based on F28235 but the PWM configuration is very close.
Please let me know if this helps. I believe it at least can give you some ideas.
Regards,
Chen
Hi Marchetti,
It seems like we still need to figure it out how to configure the PWM. Do you have any updates on your end? Does the information help at least a little bit?
Regards,
Chen
Hi, what we did is to stop and restart the PWMs trough the use of Trip Zone Software forcing at 100useconds and it worked correctly. Instead when we use the Trip Zone hardware signal (pin H2 setting as TZ2 on TMS320F28235) the restart begin uncorrectly after 750useconds.
To use your advise and example we'd like to have a practical code or pseudocode to implement. Could you give us a help in this way?
Regards
Marchetti,
Due to the US Holiday, please expect a reply early next week.
Best Regards,
Marlyn
Hi Marchetti,
I am sorry for late reply.
I think I understand most part of the way you control the boost PFC, but I thought the switching freq can be very high(or not controlled) in your case since basically you are doing hysteresis control with only one threashold? How do you setup your switching freq? what is your switching freq range now?
To answer your questions:
1. The way you implement can be one option as long as you have switching freq limit there. The delay issue you observed is weird. Let me know if you still want to implement it in this way so that I can get back to you.
2. Or I think you can use the peak current mode control for boost PFC as what I referred before. I have put all the links in the previous reply which contains the pseudocode.
3. Or you can use the average current mode control for boost PFC. We have a reference design for it
http://www.ti.com/tool/TMDSILPFCKIT
Regards,
Chen
Regards,
Chen
Hi
what we can say is that we did a similar control on a PFC using a TMS320F28035 and it works correctly (the trip zone block istantly the PWM and restart the next cycle doing the resetting of the Trip zone by software).
Here, using the 28235 we can't see the same behaivor.
For information we are implementing an average current mode but we need a cycle by cycle control of current when the current goes near a fault condition, after what we send an error message and block the PFC control.
If you need some more information like part of software, tell me.
Best regards
Hi,
Do you have any updates on your side? If not, let me get back to you on that delay issue. It is good to know it is working in f28035.
Regards,
Chen
The problem of that delay was not related to your DSP but to the hardware of our board. Now the functionality of the cycle by cycle limitation is correctly working. Thanks anyway for your assistance
Best regards