TMS320F28377D: Is it possible to oversample within the specified time I want ?

Hi Jack,

Please look at the examples in C2000Ware, specifically adc_soc_epwm_cpu01.c on how to configure the ePWM to trigger ADC sampling.  As for the SOC operation (see section 11.1.4), each of the 16 SOCs can be independently programmed and associated with:

       - any channel in ADCA that is available in the TMS320F28377D pinout

       - trigger source (ePWM, SW, CPU timers)

       - acquisition period

In short, the ADC can sample as many sources that depending on how each of the SOCs are programmed.  The number of samples from these 16 different sources (SOC) really depends on how often a trigger is received (for example, from ePWM) and results read for a given period of time.

Regards,

Joseph

Hi Joseph,

    Thank you for your reply. I have read the examples, but I still wonder how I can oversample in the specified interval. The situation is that I use PWM which is at 10kHz to dirve MOSFET, but I need to sample in every first 20us in the PWM period, not the whole time.  Can you give any suggestions to realise the function? I have ever thought about that maybe I can use the timer interrutpt as the ADC trigger source and I will enable the timer at the PWM ZRO interrupt, and disable the timer at 20us. Is it right ?

    And I notice that the ADC timings table in the reference manual as following:

   Is there any limitation to use the prescale? I notice that almost every example chooses 6 as the prescale, is it the best value?

   If I choose 6 as the prescale, than the whole time for a convertion will be (S+H time + t_EOC = 64 + 119 SYSCLK = 0.9us), is it right?

   Sorry that I am new to DSP and I have too many questions.

   Hope for your reply!

    Jack

Hi Jack,

Best place to start are the examples to understand the operation of device.  You can certainly sample every 20uS over the ePWM period.  If you are using the ePWM of the F28377D device (i'm assuming that this is where you wanted to configure the period to 10kHz to toggle the MOSFET), you can set CMPA (compare counter) of the ePWM such that you will get SOCA (adc trigger) to toggle at some regular intervals over the period.  You would not need to use the CPU timer for this task.

The maximum speed of F28377D is 200MHz (SYSCLK) and ePWM can run at half of this speed.  You can configure the time base period of the ePWM to 10000 to get a PWM period of 10kHz and set CMPA count to 2000.  This will produce adc trigger of 20uS.

On the table above, the ADC prescale is the divider that scales the SYSCLK (of 200MHz) that would feed the ADC clock.  ADC clock speed for the F28377D device has maxmum spec of 50MHz and the ADC prescale value of 6 reduces the SYSCLK to div 4  (200MHz/4) for the ADC.  Check the datasheet specification and TRM too for these details.

As far as your adc timings calculation assumptions, yes that is correct.

Regards,

Joseph

Hi Joseph,

Many thanks for your reply and your patience. I have understood the ADC timing problem, thank you.

I apologize for a mistake in my statement. What I want to do is to oversample in the first 20us of a PWM period, not every 20us. To be clear,  the PWM period is 100us, and I want to sample as much as possible in the first 20us.  Accroding to your reply, if I choose 6 as the ADCCLK prescale, then the whole time for a conversion will be 0.9us, which means I can have up to 20 samples in the 20us, right ? Then can you give any suggestions about how to implement the function? Or my idea that I will enable a timer interrupt happens every 1us in PWM ZRO interrupt, as ADC trigger source, and disable the timer when it counts 20 times, is it right or not ?

Thank you for your time and hope for your reply.

Jack

Hi Jack,

I'm not quite sure how the PWM ZRO interrupt would trigger the CPU timer then use the timer interrupt to trigger the ADC.  Is this what you meant?  Even if this would work, there seems like there is a lot of latency with this approach and might not produce the number of conversions you need within the 20us window.  Maybe you could just force the ADC to trigger (by issuing SW trigger instead) as soon as PWM counting has started.  Since you can approximate the time it takes for a conversion, you can issue the SW trigger as needed to complete for the 20us duration.

Regards,

Joseph

Hi Joseph,

Thank you very much for your reply. I am also worried about the latency.

Do you mean software trigger by SW trigger? Then could you suggest when and where should I issue the SW trigger? The first one you say as soon as PWM counting started, so should I issue the SW trigger in PWM ZRO interrupt? But how about the other later tirggers, where should I put them? 

Thank you for your time and hope for your reply.

Jack

Hi Jack,

Yes, SW trigger is software trigger.  As soon as you start the PWM counter, for instance when you initiate up counter by clearing bit CTRMODE in TBCTL and enabling TBCLKSYNC, you can issue SW trigger to any or all of the 16 SOCs by setting the corresponding bits in ADCSOCFRC1 register.  You can configure the SOCs (conversion starts with SOC0 then progresses to the next higher SOC number).  Again, i suggest you start with the example codes and build your application from those so you can be more familiar with the SOC operation.  Once you have a good grasp of how the SOC principle works on the device, it would be easier for you to determine where you need to place your triggers.

Regards,

Joseph

Hi Joseph,

I apologize for so late reply. However I still dont't find a method to let the sample run as I want. I would post another thread for help.

Thank you for your time !

Jack