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Compiler/TMS320F280049: Issue CLA compiler(v18.12.3.LTS): CLA memory allocation size

Genius 5910 points
Part Number: TMS320F280049

Tool/software: TI C/C++ Compiler

We have an issue in the size the CLA linker allocates:

situation1:

#pragma DATA_SECTION(CH_Bits, "Cla1ToCpuMsgRAM")

#pragma DATA_ALIGN(CH_Bits, 4)

volatile uint16_t CH_Bits;

#pragma DATA_SECTION(CH_Sample_Array, "Cla1ToCpuMsgRAM")

#pragma DATA_ALIGN(CH_Sample_Array, 4)

volatile int16_t CH_Sample_Array[41];

#pragma DATA_SECTION(CH_Sample_Array1, "Cla1ToCpuMsgRAM")

#pragma DATA_ALIGN(CH_Sample_Array1, 4)

volatile int16_t CH_Sample_Array1[41];

Allocated size by linker: 105

Situation2 : Total size of the variables are the samel

#pragma DATA_SECTION(CH_Bits, "Cla1ToCpuMsgRAM")

#pragma DATA_ALIGN(CH_Bits, 4)

volatile uint16_t CH_Bits;

#pragma DATA_SECTION(CH_Sample_Array, "Cla1ToCpuMsgRAM")

#pragma DATA_ALIGN(CH_Sample_Array, 4)

volatile int16_t CH_Sample_Array[41][2];

allocated size by linker:  146.  Somehow the linker has a problem with 2 dimensional arrays

also volatile int16_t CH_Sample_Array[2][41]; gives the same problem.

And why can I not change the layout?

  • I need to understand what the linker did.  Please put the linker command file and the linker map file into a zip file, then attach that to your next post.

    Thanks and regards,

    -George

  • George,

    Thanks for the reply.

    We did tried to reproduce the problem with example: cla_ex1_adc_fir and added our own CMD file.

     unfortunately in the example with our CMD file we didn't reproduce the problem.

    We already rewrite our code with the workaround.

  • I have some more data:

    From map file:

    CLA1_MSGRAMLOW 00001480 00000080 00000069 00000017 RWIX

    00001480 52 (00001480) _SampleDatac

    000014c0 53 (000014c0) _SampleDatab

    So data size:

    _SampleDatac = 0x1480 - 0x14C0 = 0x40 =>  64 words

    _SampleDatab = 0x69 - 0x40 = 0x29 => 41 words

    C Allocation:

    #pragma DATA_SECTION(SampleDatac, "Cla1ToCpuMsgRAM")

    #pragma DATA_ALIGN(SampleDatac, 4)

    volatile uint16_t SampleDatac[41];

    #pragma DATA_SECTION(SampleDatab, "Cla1ToCpuMsgRAM")

    #pragma DATA_ALIGN(SampleDatab, 4)

    volatile uint16_t SampleDatab[41];

    So can you please tell me why _SampleDatac used 64 in memory? Thanks?

  • evs said:
    please tell me why _SampleDatac used 64 in memory?

    To explain it, I need to reproduce it.  Unfortunately, I am unable to reproduce it.

    It would be ideal if you would prepare a CCS project that has this behavior.  If you can do that, then please zip up the project using the method described in the article Sharing Projects.  Then attach that zip file to your next post.

    If that is not practical, then for the CLA source file that defines the arrays, please follow the directions in the article How to Submit a Compiler Test Case.

    Thanks and regards,

    -George

  • Please submit the requested test case.

    Thanks and regards,

    -George

  • George,

    It takes a lot of time to make this test case. and I'm not willing to do that.

    The last time I committed an issue.  It took over a year to get is solved and  Ti thinks that manual adding NOP in the assembly code is a acceptable solution.

    The customer is not the testbase for testing your product. And TI code quality leaves something to wish for.

    So I think there is an issue in the memory allocator , when there is a lot of memory to allocate. If I know more,  I let you know.

    Regards,

    EVS