Tool/software: Code Composer Studio
Hi,
My EPWM CLOCK is at 100 MHz and TB clock at 1.5625 MHz (i.e. CLKDIV and HSPCLKDIV both divided by TB_DIV_4 ( 100 M / 8*8)),
from the TRM given for F28379D, while calculating FPWM (1/2*TBPRD*Time of TB Clock(1/1.5625M)), when both CLKDIV and HSPCLKDIV are set at same value, i am getting my frequency doubled than it should be. Why so ?
For other combination of CLKDIV and HSPCLKDIV it is coming correct.
By default it is given in TRM that CLK_DIV is set at TB_DIV_1 (i.e. 000/1) and HSPCLKDIV at TB_DIV_1 (i.e. 001 / 2).
Please suggest asap.

