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TMS320F28379D: Pipeline effects of the CLA

Part Number: TMS320F28379D

Hello,

I have a question regarding the pipeline of the CLA. I have seen the hands on video of the CLA. In this video is shown that single stepping through the code of the CLA is quite difficult because the result of an operation is seen due to the pipeline four single steps later.

 

It is necessary also to take care of the pipeline effects when programming the CLA in assembler too?

 

73           fResult = __sqrt(fVal);

0000a010:   73E01500   MMOV32     MR2, @0x1500, UNCF

0000a012:   7E400009   MEISQRTF32 MR1, MR2

0000a014:   778B3F00   MMPYF32   MR3, #0x3f00, MR2

0000a016:   78C20000   MCMPF32   MR2, #0x0

0000a018:   7AC00019   MMOV32     MR1, MR2, EQ

0000a01a:   7C000034   MMPYF32   MR0, MR1, MR3

0000a01c:   7C000004   MMPYF32   MR0, MR1, MR0

0000a01e:   78003FC0   MSUBF32   MR0, #0x3fc0, MR0

0000a020:   7C000005   MMPYF32   MR1, MR1, MR0

0000a022:   7C000034   MMPYF32   MR0, MR1, MR3

0000a024:   7C000004   MMPYF32   MR0, MR1, MR0

0000a026:   78003FC0   MSUBF32   MR0, #0x3fc0, MR0

0000a028:   7C000005   MMPYF32   MR1, MR1, MR0

0000a02a:   7C000024   MMPYF32   MR0, MR1, MR2

0000a02c:   74C01480   MMOV32     @0x1480, MR0

74       }

0000a02e:   7FA00000   MNOP      

0000a030:   7FA00000   MNOP      

0000a032:   7FA00000   MNOP      

0000a034:   7F800000   MSTOP    

 

The upper code is from the __sqrt() library function of the CLA. At address 0xa024 the result of the operation before (in MR0) is used directly without any MNOP. Only at the end before the MSTOP three MNOP are used.

 

 

Best regards

 

Ralf

  • Ralf Bartling said:
    It is necessary also to take care of the pipeline effects when programming the CLA in assembler too?

    The majority of CLA instructions do not require any pipeline considerations. Refer to the TRM section on CLA Pipeline section for information.

    The assembler will look for pipeline conflicts and issue an error or warning feedback so they can be corrected.  The one area that is difficult for the assembler to detect is the write followed by read condition to peripheral registers when pointers are used.  This is described in the TRM section on CLA Pipeline Alignment.

    For the code you have highlighted, the contents of the register will be loaded in time for the next instruction.  No additional MNOP is required. 

    [quote user="Ralf Bartling"]

    0000a024:   7C000004   MMPYF32   MR0, MR1, MR0

    0000a026:   78003FC0   MSUBF32   MR0, #0x3fc0, MR0

    [/quote

    MPYF32 is a single-cycle instruction (see the instruction description in the TRM).  MR0 will be loaded properly before MSUB32 reads the register.  If this was not the case, the assembly tools would flag an error.

    Regards

    Lori