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Are there any differences between the the C28x pipeline and the CLA pipeline?

Di Jiao
Intellectual 815 points

Hi,

I am learning the piccolo series DSC with F28069 and working on the ADC temperature sensor conversion functions.

In the example, the completion of ADC sampling is judged by EOCx INT pulse and as shown below.

//Wait for end of conversion.
while(AdcRegs.ADCINTFLG.bit.ADCINT1 == 0){}  //Wait for ADCINT1
AdcRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;        //Clear ADCINT1

But I looked at the ADC timing and found that the int pulse occurs much earlier than the point that the result is latched.

Then I referred to the CLA chapter and there is something about the ADC Early Interrupt to CLA Response. Then I know CLA can get the correct ADC result.

Does the C28x pipeline is the same with the CLA pipeline?

In the TMS320C28x Extended Instruction Sets Technical Reference Manual there is a figure about the C28x pipeline, it seems just the same as the CLA pipeline.

So can I just think they are the same and I can make sure that the result I read is a correct one?

thanks and regards

: )

-Di

  • 0
    Intellectual 815 points
    :)
    I need your help...
  • 0
    TI__Mastermind 20850 points

    Di Jiao said:
    Does the C28x pipeline is the same with the CLA pipeline?

    Its the same in the sense that you have an 8 stage pipeline for both the CLA and the C28x, but the CLA pipeline is unprotected, whereas the C28 is protected - by that i mean if you have two instructions, the first writes to location A, the second reads from A; according to the pipeline the read happens ahead of the write so you run into this read-before-write hazard. The C28x pipeline will automatically stall the read till the write happens BUT the CLA pipeline will not...so care needs to be taken when writing CLA assembly. 

    However, when writing C code you don't really see these differences. There are some other differences, in that the accelerators like VCU, TMU and FPU all work off the main C28x pipeline.

    Di Jiao said:
    So can I just think they are the same and I can make sure that the result I read is a correct one?

    the idea with the early adc interrupt is that it triggers an interrupt at the point when the conversion begins, and not at the end of conversion. this feature was targeted to the CLA...from the table you can see that you have to wait 8 cycles before reading the ADC result; so this essentially gives you 8 cycles to do something else (in assembly code) before the result is ready.

    You can also do this on the C28x but i think it takes about 8 cycles overhead to get into the ISR so you have to take that into account. But again this early interrupt is there so you can do a few pre-calculations (assembly) before reading the ADC result, effectively shortening your control loop, and increasing the max  loop frequency

  • 0 in reply to Vishal_Coelho
    Intellectual 815 points
    Hi,
    Thanks for your professional answer!
    In fact, now I realize that the I1~I7 instructions in the figure are irrelevant to the reading instruction...just like some delay? So the CLA can get correct results.
    So when I use the C28 core to read the ADC result I should also do leave at least 8(?) instructions before the reading instruction. And getting into the ISR will also cost some cycles.
    Now I want to know why there are two "Task Setup" in the figure?
    -Di
  • 0 in reply to Di Jiao
    TI__Mastermind 20850 points

    Di Jiao said:
    Now I want to know why there are two "Task Setup" in the figure?

     

    The two cycles  labeled "Task Setup" is the hardware delay from the time the trigger to a task is received to the first instruction in the task. Its a fixed 2 cycle delay on all devices that have the CLA