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Tool/software: Code Composer Studio
We use EPwm7, EPwm9 and EPwm11 for a 3-phase motor.
I want to switch off the PWM with the output of the comparator modules (COMxPOUT).
The comparator outputs go to trip inputs 1, 2 and 3.
Together with other trip inputs 4, 7, 8, 9, 11 a DCAEVT1 event is generated,
the PWM is switched off and an interrupt is triggered.
In the interrupt I would like to query the COMPSTS bit
so that I know which of the 3 comparators has responded.
The query only works in the EPwm7 interrupt.
The query of the comparator status in the EPwm9 and EPwm11
interrupts does not work, although the comparator status is
the cause of the interrupt.
What is wrong?
Here is the code:
(EPwm9 and EPwm11 are initialized accordingly)
// Define an event (DCAEVT1) // TRM 737
EPwm7Regs.DCAHTRIPSEL.bit.TRIPINPUT1 = 1; // Map Trip input 1 comparator U to DCAH
EPwm7Regs.DCAHTRIPSEL.bit.TRIPINPUT2 = 1; // Map Trip input 2 comparator V to DCAH
EPwm7Regs.DCAHTRIPSEL.bit.TRIPINPUT3 = 1; // Map Trip input 3 comparator W to DCAH
EPwm7Regs.DCAHTRIPSEL.bit.TRIPINPUT4 = 1; // Map Trip input 4 ERROR0 to DCAH
EPwm7Regs.DCAHTRIPSEL.bit.TRIPINPUT7 = 1; // Map Trip input 7 ERROR1 to DCAH
EPwm7Regs.DCAHTRIPSEL.bit.TRIPINPUT8 = 1; // Map Trip input 8 ERROR2 to DCAH
EPwm7Regs.DCAHTRIPSEL.bit.TRIPINPUT9 = 1; // Map Trip input 9 ERROR3 to DCAH
EPwm7Regs.DCAHTRIPSEL.bit.TRIPINPUT11 = 1; // Map Trip input 11 ERROR5 to DCAH
EPwm7Regs.DCTRIPSEL.bit.DCAHCOMPSEL = 0xF; // DCAH = Trip combination input (all trip inputs selected by DCAHTRIPSEL register ORed together)
EPwm7Regs.TZDCSEL.bit.DCAEVT1 = TZ_DCAH_HI; // DCAEVT1 = DCAH high
EPwm7Regs.DCACTL.bit.EVT1SRCSEL = DC_EVT1; // DCAEVT1 = DCAEVT1 (not filtered)
EPwm7Regs.DCACTL.bit.EVT1FRCSYNCSEL = DC_EVT_ASYNC; // Take async path
// Enable DCAEVT1 as one shot trip sources
// Note: DCxEVT1 events can be defined as one-shot.
// DCxEVT2 events can be defined as cycle-by-cycle.
EPwm7Regs.TZSEL.bit.DCAEVT1 = 1;
// Trip zone register for event switch off EPWM outputs A + B
EPwm7Regs.TZCTL.bit.DCAEVT1 = TZ_FORCE_LO; // Trip action set to force-low for output A
// Trip zone register for software switch off EPWM outputs A + B
EPwm7Regs.TZCTL.bit.TZA = TZ_FORCE_LO; // Trip action set to force-low for output A (TRM 725ff)
EPwm7Regs.TZCTL.bit.TZB = TZ_FORCE_LO; // Trip action set to force-low for output B
// Register ISR for Trip Zone Interrupt EPWM7
PieVectTable.EPWM7_TZINT = &epwm7_tzint_isr;
// Enable CPU INT2 which is connected to EPWM1-8 INT:
IER |= M_INT2;
// Enable EPWM INTn in the PIE: Group 2 interrupt 7
PieCtrlRegs.PIEIER2.bit.INTx7 = 1;
// Enable TZ interrupt DCAEVT1
EPwm7Regs.TZEINT.bit.DCAEVT1 = 1;
//--------------------------------------------------
__interrupt void epwm7_tzint_isr(void)
{
if (Comp1Regs.COMPSTS.bit.COMPSTS == 1) /* Comparator U? */
ERR_U = 1;
// Acknowledge this interrupt to receive more interrupts from group 2
PieCtrlRegs.PIEACK.all = PIEACK_GROUP2;
}
//--------------------------------------------------
// Initialize GPIO:
InitComp1Gpio(); // output GPIO193 --> input GPIO56
// TRM 977
Comp1Regs.COMPCTL.bit.COMPDACEN = 1; // Enable COMP1
Comp1Regs.COMPCTL.bit.COMPSOURCE = 0; // Use DAC1 as minus input to comparator
Comp1Regs.DACVAL.bit.DACVAL = ilim_val; // Set DAC1 to ILIM-Value, 0...5V = 0...1023
Comp1Regs.COMPCTL.bit.CMPINV = 0; // Do not invert comparator output: Output high if input A > input B
Comp1Regs.COMPCTL.bit.SYNCSEL = 1; // Synchronous output
Comp1Regs.COMPCTL.bit.QUALSEL = 2; // Filter 0...15 = 1...16 Takte @ 150MHz/4
// Comparator output is Comp1Regs.COMPSTS.bit.COMPSTS
// init trip inputs
EALLOW;
GpioG1TripRegs.GPTRIP1SEL.bit.GPTRIP1SEL = 56; // Select PJ0_GPIO56 as trip input 1 for U
EDIS;
JuergenZ said:The comparators monitor the current limit. If this is exceeded in one comparator,
all three EPWM should be switched off immediately and simultaneously. This works.
I assume that you are using DCxxTRIPSEL to enable the multiple comparator TRIPINn sources to trip the EPWMs simultaneously.
JuergenZ said:In the Trip Zone Interrupt I query the status bit COMPSTS to determine which comparator effect.
(Comparator 1 in Trip Zone Interrupt 7, Comparator 2 in TZINT 9 or Comparator 3 in TZINT 11).
This works only in Trip Zone Interrupt 7 (Comparator 1).If the three trip zone interrupts are triggered by the Comparator 2 or 3, the status bit COMPSTS
in trip zone interrupts 9 or 11 is not set at the time of the query.
Only if I wait for a while in trip zone interrupt 9 or 11 the status bit is set.I do not understand this because the comparator outputs 2 or 3 are the trigger of the Trip Zone Interrupts 9 or 11 itself!
And so the comparator status bit must be set!
A couple of things to consider:
JuergenZ said:•Do the EPWM outputs have influence over the trip source?
In practice yes. At the moment I'm testing on the desk with an analog voltage at the comparator inputs.
If the comparator input voltage is held near the trip threshold, the comparator output may oscillate between tripped and untripped if there is input noise. I recommend monitoring the COMPnOUT signal on the pin if instability might fit your observations. It may also be helpful to profile the COMPnOUT pin activity during the ISR when COMPSTS is being read.
JuergenZ said:•Do you have any unused GPIO interrupts, EPWM modules, or EPWM DCxEVT data paths?
EPWM are not free. DCAEVT2, DCBEVT1, DCBEVT2 are free.
It should be possible to make use of the spare DCBxx path of each EPWM to only monitor its coupled comparator output. For example, EPWM7.DCBEVT1=TRIPIN1, EPWM9.DCBEVT1=TRIPIN2, EPWM11.DCBEVT1=TRIPIN3.
The DCBEVT path has latched status bits that are more reliable for finding the trip source.
