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TMS320F28377D: Time delay between CPU1 sets IPC flag and CPU2 enters ISR

Etiam
Intellectual 730 points
Part Number: TMS320F28377D

Hello,

I have a DMA ISR in CPU1 at a frequency of 31.2 kHz and inside this ISR CPU1 sets IPC flag 0. Then, I have another ISR FLAG0-ipc inside CPU2 code. I would like to know the time between CPU1 sets the flag and CPU2 enters the ISR. I'm using GPIOs to measure this time through an oscilloscope and I'm getting around 1.3us of delay, which I think its too much according to datasheet which I think it talks about 2 clock cycles. 

I'm running at 200MHz clock. I modified my code in order to have only one interrupt in cpu2 (this IPC flag0 interrupt) and nothing in main while(1)bucle, since first I thought that this big time was due to cpu2 maybe was doing other tasks with higher priority. But now nothing is executed by cpu2 except this interrupt. The same for CPU1, now I only have DMA interrupt service routine to set IPC flag0 and only watchdog clear in while(1) bucle.

What I'm doing wrong? How can I measure this time?

Thank you very much

maite

  • 0
    TI__Guru 55700 points

    Maite,

    IPC has IPCCOUNTERH / IPCCOUNTERL register to timestamp IPC events. You can use this to check the time delay instead of using GPIOs.

    Also, it is my understanding that we don't document the time delay between CPU1 setting IPC flag and CPU2 entering ISR? Where did you get 2 clock cycle information? Can you please let me know where you got this information.

    Regards,

    Manoj

  • 0 in reply to Manoj Santha Mohan
    Intellectual 730 points

    Hello Manoj,

    thanks for your answer, I will try to use IPCCOUNTERH/IPCCOUNTERL to check this time. As yesterday I was reading a lot of documents I thought I've read in the datasheet or TRM this "2 cycles delay", but your are true, I read this in one post of this forum: "IPCFLG and IPCSTS bits will be set with-in couple of cycles after write" https://e2e.ti.com/support/microcontrollers/c2000/f/171/t/642258?tisearch=e2e-sitesearch&keymatch=28377d%2520ipc%2520flag%2520delay But now I see this is not the delay I'm asking for. Sorry for my error.

    By the way, another problem I'm facing and that I don't know neither why nor how to check where is my error, is that the ISR Flag0 executed by CPU2 takes for example 2.1us to execute a task that CPU1 (for the same code) takes 120ns. I check this times with GPIOs and an oscil·loscope. I've also compared both .asm files (from CPU1 and CPU2) and I don't see any extra instructions in CPU2 file, so I don't know what else I can check.

    In CPU2 I only have this interrupt and CpuTimer1  interrupt but I've checked that they are not called at the same time.

    Thank you very much

    Best regards,

    Maite

  • 0 in reply to Etiam
    Intellectual 730 points

    Hello Manoj,

    I found my error, I didn't remember to load to RAM these functions in CPU2, in CPU1 they were executed from RAM, so time comparison was not correct. Now it's working fine.

    Thank you

    Maite