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CCS/TMS320F28377D: EPWM1, 2,3 are defined and initialized in CPU1, and ePWM1 interrupt configuration is conducted in CPU2. CPU2 cannot enter ePWM interrupt.

user6301134
Prodigy 50 points
Part Number: TMS320F28377D

Tool/software: Code Composer Studio

EPWM1, 2,3 are defined and initialized in CPU1, and ePWM1 interrupt configuration is conducted in CPU2. CPU2 cannot enter ePWM interrupt.

That's what it says in the manual:

Some interrupts come from shared peripherals that can be owned by either CPU, such as the ADCs and SPIs. These interrupts are sent to both PIEs regardless of the peripheral's ownership. Thus, a peripheral owned by one CPU can cause an interrupt on the other CPU if that interrupt is enabled in the other CPU's PIE.
That means I can just configure PIE directly in CPU2, right?- But CPU2 can not enter the PWM1 interrupt by this way, or does the manual mean that only ADC, SPI can directly configure interrupts from another CPU, not including PWM peripherals.
CPU2 main function code is as follows:
void main(void)
{
    InitSysCtrl();
    DINT;
    InitPieCtrl();
    IER = 0x0000;
    IFR = 0x0000；
    InitPieVectTable();
    EALLOW;
    PieVectTable.EPWM1_INT= &speed;
    EDIS;
    IER |= M_INT3;
    PieCtrlRegs.PIEIER3.bit.INTx1 = 1;
    EINT;  
    ERTM;  
   IPCLtoRFlagSet(IPC_FLAG17);同步CPU1；
    while(1);
}
  • 0
    TI__Genius 10845 points

    Hi,

    Can you check if the interrupt is getting recieved at CPU1? There might be some issue with PWM configurations.

    Also, ideally the ownership of PWM1 should be passed to CPU2 as there might be need to perform some critical PWM configurations in ISR. What is the usecase of keeping the ownership still with CPU1?

    Thanks

    Vasudha

  • 0 in reply to Vasudha Bhadoria
    Prodigy 50 points

    EPWM1, 2,3 are defined and initialized at CPU1.

    When i just configure the pwm1 interrupt at CPU1, the CPU1 can enter the pwm1 interrupt .

    When i configure the  pwm1 interrupt in the CPU1 and CPU2, both of them can enter the  pwm1 interrupt. 

    When i just configure the pwm1 interrupt at CPU2, the CPU2 can not enter the pwm1 interrupt .

    I want to construct a motor control system. CPU1 is responsible for current loop calculation and generate PWM duty ratio. If the CPU2 control the PWM module, Can CPU1 write the value to the register directly? If not, CPU1 maybe use the meassageRAM and create the delay of communication.

    Thanks for your help.

  • 0 in reply to user6301134
    TI__Genius 10845 points

    Hi,

    Can you check if interrupt is enabled and latched at EPWM level in CPU1 by checking the ETFLG.INT in Debug window? Try clearing the EPWM interrupt flag before enabling the interrupt at CPU2. Check if Interrrupt is getting latched at PIE level in CPU2. Also please share the ISR code at CPU2, the interrupt needs to be acknowledged in CPU2 ISR.

    Thanks

    Vasudha