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TMS320F28374D: External Memory interface

ELISA SACCHI
Prodigy 150 points

Part Number: TMS320F28374D
Other Parts Discussed in Thread: TMS320F2837,

We are developping a new board with TMS320F28374D, the DSP is connect to Asyncronous RAM and to a FPGA using External Memeory interface bus. In the old board we have the DSP TMS320C2834x the XINF interface requires the XREADY and XCLOCKOUT signals. For TMS320F2837 these signals are not present, is it right? Can we omit them? 

 

 

  • 0
    TI__Guru** 116021 points

    Hi,

    We have READY signal. It's called WAIT on this device (e.g. EMIF1_WAIT). We also have clock signal called CLK (e.g. EMIF1_CLK). Since it is ASYNC interface clock signal is not needed so not sure why you need it.

    Regards,

    Vivek Singh 

  • 0 in reply to Vivek Singh
    Prodigy 150 points

    Looking in the TMS320C2834x  datascheet I find this configuration diagram, It make me think that the External wait-state generator is needed by XINTF interface even if it is connected to an asyncronous memory that doesn't need clock and doesn't have ready signal. 

    I only like to know if the EMIF interface of TMS320F28374D need these signals.

    E.

  • 0 in reply to ELISA SACCHI
    TI__Guru** 116021 points

    Hi,

    That is just an example shown where if external wait state logic is out side of external memory/fpga device and needed the clock then it can be used like that. So you need to read the spec of external device you are connecting and see if that is the case.

    Regards,

    Vivek Singh