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TMS320F280049: Get more than 2 Interrupts from (symmetric) PWM (not only time underflow+period)

StephanS
Genius 4077 points
Part Number: TMS320F280049

Hi,

we can get 2 interrupts from a PWMmodule by setting INTSEL to 3:

011: Enable event time-base counter equal to zero or period
(TBCTR = 0x00 or TBCTR = TBPRD). This mode is useful in up-
down count mode.

With this, we can achieve f.e. a 10kHz Interrupt with a 5 kHz PWM.

Unfortunately, it is not possible to get >2 interrupts, f.e. a 20kHz Interrupt with a 5 kHz PWM.

I would like to see this possibility by using an ADDITIONAL interrupt for f.e. CompareC/D up-+downcount (at period/2).
At the moment, we can only have either timer underflow and period interrupts or compare A/B/C/D up- or downcount interrupts.
A possibility to combine these via OR would be really nice.

Is the actual behaviour as described above or do I miss something?
Maybe TI could consider this for future development.

Stephan

  • 0
    TI__Guru 52020 points

    Can you use two linked EPWM modules (EPWM1 and EPWM2) and do more interrupts? register the same function as the handler?

    There are MANY ways to have this happen in your system.

    Nima

  • 0 in reply to Nima Eskandari
    Genius 4077 points

    Maybe I was too short with the description.

    I know there are ways to solve this - but always at the cost of additional resources (another synced PWM or eCAP).

    We are low at free resources, so I thought about using only one resource.

    This works for higher frequency PWM and using lower frequency interrupts (f.e. 20kHz PWM, 5 kHz interrupts) via INTPRD, but not in the direction I described above.

    Stephan

  • 0 in reply to StephanS
    TI__Guru 52020 points

    Here is two other options,

    1. You can set interrupts to occur at CTR=ZERO

    2. When the interrupt occurs, change the interrupt source to CTR=CMPA

    3. When the interrupt occurs, change the interrupt source to CTR=CMPB

    and so on.

    OR

    use the CLB to generate the interrupts for you.