Part Number: TMS320F28035
Hi,
I have a pretty simple query. I am working a project which needs to me to use the SCI FIFO on TMS320F28035 . But referring to the SPRUI10 technical reference manual (www.ti.com/.../sprui10.pdf) I was a bit confused as to how many levels of FIFO does the chip offer.
On page 728 it is mentioned that the SCI peripheral transmitter and receiver each offer 4 level deep FIFO. But on page 739 point 6 in SCI FIFO Description says "Transmit and receive buffers are supplemented with two 16-levelFIFOs" . And on the very next page 729. In the logic diagram its represented as 16 x 8 bit FIFO with 16 levels.
I am not entirely sure if its only 4 level deep. May be I am misinterpreting something .
Thank you and be safe !
Rajesh.
