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Tool/software: Code Composer Studio
Hi,
i have the same question like the thread: https://e2e.ti.com/support/microcontrollers/c2000/f/171/p/817892/3030902#3030902
it needs boot from flash when normal operation while boot from usb if user wants to upgrade firmware.
do you have the sample code to us now? thanks.
Feng
Hi Chen,
User need to implement the solution mentioned by Sal in other post. We do not have sample code for this usecase. Let's see if Aki has something which he can share with you.
Regards,
Vivek Singh
Dear Vivek,
Does TI have any instruction about how to make a function call(in flash application) into the ROM bootloader which we want ? Just like Sal Pezzino said in the thread "https://e2e.ti.com/support/microcontrollers/c2000/f/171/p/817892/3030902#3030902"
pls kindly give your support. our project is waiting for usb bootloader development and now is halted on.
Many many thanks for your help.
Feng
Feng
Within C2000Ware under libraries, you'll find a section for boot code and in there is boot ROM symbol libraries (also bootloader source for reference for your API prototype). Include this in your project and then you can call into the USB bootloader.
Best regards
Chris
Feng
Yes, that is folder, except you should download the newest C2000Ware since the latest F2837xS boot code is revB.
\C2000Ware_3_01_00_00\libraries\boot_rom\f2837xs\revB
You could look at the below example which makes use of a boot symbol library:
C:\ti\c2000\C2000Ware_3_01_00_00\device_support\f2837xs\examples\cpu1\F2837xS_sci_flash_kernel
In your project you should add the function prototype for the bootloader you want to call such as "Uint32 USB_Boot(Uint16 bootMode)" - can find this in the boot source code. Then include the symbol library which will link the function to the correct place in ROM memory.
\C2000Ware_3_01_00_00\libraries\boot_rom\f2837xs\revB\rom_sources\F2837x_bootROM\cpu01-bootROM\source
Best regards
Chris
Hi Chris,
thanks for your guide. i can find the source code for SCI and usb boot_rom.
one question i still do not understand:
1. when i want to upgrade firmware from SCI,
first: i can choose the boot mode by two gpio,(gpio72 is 0 and gpio84 is 1), then reset mcu, it will boot from SCI refer to below figure
second: and then use C2Prog.exe app or ti provided app "serial_flash_programmer.exe"under "C:\ti\c2000\C2000Ware_1_00_05_00\utilities\flash_programmers\serial_flash_programmer" to upgrade firmware.
third: after upgrading firmware complete, change back gpio72 to 1 and gpio84 to 1. then reset mcu, it will boot from Flash by default.
the procedure for SCI bootloader is very clear to understand.
for usb bootloader, i think it should be the same procedure as SCI bootloader. am i right?
so:
2. when i want to upgrade firmware from usb,
first: we should choose the boot mode by two gpio72 and gpio84(both are set to 1), and it will boot from Get boot mode,
and then change BOOTCTRL in OTP value to set Key with 0x5A and BMODE with use boot(in standalone mode).
My question is: OTP is one-time program and can not be changed frequently. so how can i enter usb boot mode frequently and choose back to boot from flash when firmware upgrade complete?
Feng
Yes, you want to follow Sal's suggestion. So you'll use the boot select pins to switch to SCI boot when needed, otherwise you boot to flash. Within the flash, as you laid out, you decide if you need to call the USB bootloader or not.
Other option is to always to boot flash and have an additional decision point in the application code to call the SCI bootloader or USB bootloader.
Best regards
Chris
Dear Chris,
thanks very much for your confirmation.
after calling usb or SCI bootloader in flash, how to jump back to flash entrance?
I studied it from the TI e2e forum and think it should be the sample code in below. pls refer to:
please help me confirm whether it is correct or not? if not, please advise the correct jump method. thanks a lot
in flash app:
main()
{
...//Omitted code about application
if（flag_to_call_bootloader == TRUE）
{
EntryAddr = USB_Boot();
((void (*)(void))EntryAddr)();
}
}
Feng
Feng,
The code you posted is the correct way to branch to your flash application.
Best regards
Chris
Hi Chriss,
some progress updated to you:
1. when branch to SCI boot by two gpio with gpio72==High and gpio84==Low,
use C2Prog.exe to program the mcu, then the result is OK. pls refer to below figure:
2.when branch to SCI boot from flash by calling func SCI_Boot(0),
use C2Prog.exe to program the mcu, then the result is FAIL. pls refer to below figure:
any suggestion for me to debug this?
Feng
more progress updated to you:
1. branch to SCI boot by gpio and use serial_flash_programmer.exe to program the mcu
and the result is OK. pls see below figures
step 1: it stop at below after execute serial_flash_programmer.exe
step2: select "1" and when programming finished, it stops at the below:
2. branch to SCI boot by calling SCI-Boot() in flash and use serial_flash_programmer.exe to program the mcu
and the result is FAIL. pls see below figures
step 1: it stop at below after execute serial_flash_programmer.exe and halted, and has no any response anymore.
would you pls give further advice? thanks.
3. my source code to call SCI_Boot() in flash:
and I can see the return address when calling SCI_Boot(0) is 0x00000000. pls refer to below, is this correct?
Feng
Feng
Alright, lets debug using the serial flash programmer as I am more familiar. I'm fairly confident that when we resolve that, C2Prog will then also work.
Can you re-run using the serial flash programmer with "-v" as part of command to enable verbose diagnostics?
When you run with the SCI bootloader being called from flash, you're doing the same order? In terms of order I mean, the SCI bootloader is receiving the kernel and then kernel is receiving the application?
I'd also check that your flash app and the kernel that is being loaded to RAM via the SCI bootloader call aren't trying to use the same RAM space. This is currently my most likely theory.
Best regards
Chris
Hi Chris,
pls find my reply below with red fond:
Can you re-run using the serial flash programmer with "-v" as part of command to enable verbose diagnostics?
Feng: yes, pls find the new result in below:
When you run with the SCI bootloader being called from flash, you're doing the same order? In terms of order I mean, the SCI bootloader is receiving the kernel and then kernel is receiving the application?
Feng: it should be the same order, but I am not sure.
I'd also check that your flash app and the kernel that is being loaded to RAM via the SCI bootloader call aren't trying to use the same RAM space. This is currently my most likely theory.
Feng: how to check that? I think it should be related with cmd file,so I attach it for your reference. and pls give me more details.
Looking forward to you.
Feng
https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/171/2837xD_5F00_FLASH_5F00_lnk_5F00_cpu1.7z
Feng
You should look at the kernel linker cmd file and the app that calls the SCI boot. It is likely they at least sharing the same stack memory (look in the SECTIONs part of the linker cmd file). Try re-assiging one of those to a different location.
Additionally, when you reach the "Attempting autobaud...", you should connect to the device (without GEL, remove it from the target configuration file under advanced section) and then "load symbols" using CCS for the kernel to see where the kernel currently is. You can also take this time to confirm that the kernel is loaded into the device memory, which it should be.
EDIT: Also please tell me which version of C2000Ware you're using the kernel and serial flash programmer from.
Best regards
Chris
Hi Chris,
You should look at the kernel linker cmd file and the app that calls the SCI boot. It is likely they at least sharing the same stack memory (look in the SECTIONs part of the linker cmd file). Try re-assiging one of those to a different location.
Feng: I will try to re-assign but too many of RAM are overlapped between app and kernel cmd.
Additionally, when you reach the "Attempting autobaud...", you should connect to the device (without GEL, remove it from the target configuration file under advanced section) and then "load symbols" using CCS for the kernel to see where the kernel currently is. You can also take this time to confirm that the kernel is loaded into the device memory, which it should be.
Feng: I want to learn how to load symbols to debug the kernel, can you describe more details or any document to study step by step?
EDIT: Also please tell me which version of C2000Ware you're using the kernel and serial flash programmer from.
Feng: CCS version is: v7.4.0 and controlSUITE version is v3.4.9. and serial flash programmer(serial_flash_programmer.exe) and kernel file(F2837xD_sci_flash_kernels_cpu01.txt) are under "c:\ti\controlSUITE\device_support\~Utilities\serial_flash_programmer\"
Feng
Feng,
I read the thread, and wanted a couple of clarifications.
1. You mention 2 approaches, the first works and the second doesn't. The first approach is where you set the system to normal SCI boot mode, correct? The second approach is where you jump to SCI boot from within Flash boot after entering the application.
2. Can you tell me which project you built to generate the F2837xs SCI Flash Kernel, and which version of C2000Ware? Please also tell me the exact command you used. This will help me with the other e2e thread where a user is facing a similar issue.
Thanks,
Sira
Hi Sira,
pls find my reply with red fond:
1. You mention 2 approaches, the first works and the second doesn't. The first approach is where you set the system to normal SCI boot mode, correct? The second approach is where you jump to SCI boot from within Flash boot after entering the application.
Feng: in the first approach which works well, I set GPIO72(Low) and GPIO84(High) to branch to SCI boot mode, which can be select in my board.
in the second approach which failed, I call SCI_Boot() function in my application with adding symbol lib to project. set gpio72 High and gpio84 High to enter flash boot and when reset power it will go into the main: in main I use an IO to trigger and enter the function call SCI_Boot().
2. Can you tell me which project you built to generate the F2837xs SCI Flash Kernel, and which version of C2000Ware? Please also tell me the exact command you used. This will help me with the other e2e thread where a user is facing a similar issue.
Feng: CCS version is: v7.4.0 and controlSUITE version is v3.4.9. and serial flash programmer(serial_flash_programmer.exe) and kernel file(F2837xD_sci_flash_kernels_cpu01.txt) are under "c:\ti\controlSUITE\device_support\~Utilities\serial_flash_programmer\". actually I use the default setting
the exact command is in below: pls take a look
Feng
Hi Chris,
I reassign the cmd. pls find them in attached and help check whether it is correct or not.
since I use the default kernel provided by ti under "C:\ti\controlSUITE\device_support\~Utilities\serial_flash_programmer", so I think it should be generated by the project under "C:\ti\controlSUITE\device_support\F2837xD\v170(or other version)\F2837xD_examples_Dual\F2837xD_sci_flash_kernels\cup01".
so the "kernel.cmd" is from "C:\ti\controlSUITE\device_support\F2837xD\v170(or other version)\F2837xD_examples_Dual\F2837xD_sci_flash_kernels\cup01"
MEMORY
{
PAGE 0 : /* Program Memory */
/* Memory (RAM/FLASH) blocks can be moved to PAGE1 for data allocation */
/* BEGIN is used for the "boot to Flash" bootloader mode */
BEGIN : origin = 0x080000, length = 0x000002
RAMM0 : origin = 0x000122, length = 0x0002DE
RAMD0 : origin = 0x00B000, length = 0x000800
RAMLS0 : origin = 0x008000, length = 0x000800
RAMLS1 : origin = 0x008800, length = 0x000800
RAMLS2 : origin = 0x009000, length = 0x000800
RAMLS3 : origin = 0x009800, length = 0x000800
RAMLS4 : origin = 0x00A000, length = 0x000800
RAMGS14 : origin = 0x01A000, length = 0x001000
RAMGS15 : origin = 0x01B000, length = 0x001000
RESET : origin = 0x3FFFC0, length = 0x000002
/* Flash sectors */
FLASHA : origin = 0x080002, length = 0x001FFE /* on-chip Flash */
FLASHB : origin = 0x082000, length = 0x002000 /* on-chip Flash */
FLASHC : origin = 0x084000, length = 0x002000 /* on-chip Flash */
FLASHD : origin = 0x086000, length = 0x002000 /* on-chip Flash */
FLASHE : origin = 0x088000, length = 0x008000 /* on-chip Flash */
FLASHF : origin = 0x090000, length = 0x008000 /* on-chip Flash */
FLASHG : origin = 0x098000, length = 0x008000 /* on-chip Flash */
FLASHH : origin = 0x0A0000, length = 0x008000 /* on-chip Flash */
FLASHI : origin = 0x0A8000, length = 0x008000 /* on-chip Flash */
FLASHJ : origin = 0x0B0000, length = 0x008000 /* on-chip Flash */
FLASHK : origin = 0x0B8000, length = 0x002000 /* on-chip Flash */
FLASHL : origin = 0x0BA000, length = 0x002000 /* on-chip Flash */
FLASHM : origin = 0x0BC000, length = 0x002000 /* on-chip Flash */
FLASHN : origin = 0x0BE000, length = 0x002000 /* on-chip Flash */
PAGE 1 : /* Data Memory */
/* Memory (RAM/FLASH) blocks can be moved to PAGE0 for program allocation */
BOOT_RSVD : origin = 0x000002, length = 0x000120 /* Part of M0, BOOT rom will use this for stack */
RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
RAMD1 : origin = 0x00B800, length = 0x000800
RAMLS5 : origin = 0x00A800, length = 0x000800
//RAMGS0 : origin = 0x00C000, length = 0x001000
//RAMGS1 : origin = 0x00D000, length = 0x001000
RAMGS0 : origin = 0x010100, length = 0x001F00
RAMGS1 : origin = 0x012000, length = 0x002000
RAMGS2 : origin = 0x00E000, length = 0x001000
// RAMGS_ALL : origin = 0x00F000, length = 0x00B000//0x006000
RAMGS_ALL : origin = 0x00F000, length = 0x001000//0x006000
// RAMGS_ALL2 : origin = 0x011000, length = 0x003F00//0x006000
/* RAMGS3 : origin = 0x00F000, length = 0x001000
RAMGS4 : origin = 0x010000, length = 0x001000
RAMGS5 : origin = 0x011000, length = 0x001000
RAMGS6 : origin = 0x012000, length = 0x001000
RAMGS7 : origin = 0x013000, length = 0x001000
RAMGS8 : origin = 0x014000, length = 0x001000
RAMGS9 : origin = 0x015000, length = 0x001000
RAMGS10 : origin = 0x016000, length = 0x001000
RAMGS11 : origin = 0x017000, length = 0x001000
RAMGS12 : origin = 0x018000, length = 0x001000
RAMGS13 : origin = 0x019000, length = 0x001000*/
CPU2TOCPU1RAM : origin = 0x03F800, length = 0x000400
CPU1TOCPU2RAM : origin = 0x03FC00, length = 0x000400
}
SECTIONS
{
/* Allocate program areas: */
.cinit : > FLASHB PAGE = 0, ALIGN(4)
.pinit : > FLASHB, PAGE = 0, ALIGN(4)
.text : >> FLASHB | FLASHC | FLASHD | FLASHE PAGE = 0, ALIGN(4)
codestart : > BEGIN PAGE = 0, ALIGN(4)
ramfuncs : LOAD = FLASHD,
RUN = RAMLS0 | RAMLS1 | RAMLS2 |RAMLS3,
LOAD_START(_RamfuncsLoadStart),
LOAD_SIZE(_RamfuncsLoadSize),
LOAD_END(_RamfuncsLoadEnd),
RUN_START(_RamfuncsRunStart),
RUN_SIZE(_RamfuncsRunSize),
RUN_END(_RamfuncsRunEnd),
PAGE = 0, ALIGN(4)
/* Allocate uninitalized data sections: */
.stack : > RAMM1 PAGE = 1
.ebss : >> RAMLS5 | RAMGS0 | RAMGS1 |RAMGS_ALL PAGE = 1
.esysmem : > RAMLS5 PAGE = 1
/* Initalized sections go in Flash */
.econst : >> FLASHF | FLASHG | FLASHH PAGE = 0, ALIGN(4)
.switch : > FLASHB PAGE = 0, ALIGN(4)
.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */
Filter_RegsFile : > RAMGS0, PAGE = 1
SHARERAMGS0 : > RAMGS0, PAGE = 1
SHARERAMGS1 : > RAMGS1, PAGE = 1
ramgs0 : > RAMGS0, PAGE = 1
ramgs1 : > RAMGS1, PAGE = 1
#ifdef __TI_COMPILER_VERSION
#if __TI_COMPILER_VERSION >= 15009000
.TI.ramfunc : {} LOAD = FLASHD,
RUN = RAMLS0 | RAMLS1 | RAMLS2 |RAMLS3,
LOAD_START(_RamfuncsLoadStart),
LOAD_SIZE(_RamfuncsLoadSize),
LOAD_END(_RamfuncsLoadEnd),
RUN_START(_RamfuncsRunStart),
RUN_SIZE(_RamfuncsRunSize),
RUN_END(_RamfuncsRunEnd),
PAGE = 0, ALIGN(4)
#endif
#endif
/* The following section definitions are required when using the IPC API Drivers */
GROUP : > CPU1TOCPU2RAM, PAGE = 1
{
PUTBUFFER
PUTWRITEIDX
GETREADIDX
}
GROUP : > CPU2TOCPU1RAM, PAGE = 1
{
GETBUFFER : TYPE = DSECT
GETWRITEIDX : TYPE = DSECT
PUTREADIDX : TYPE = DSECT
}
/* The following section definition are for SDFM examples */
Filter1_RegsFile : > RAMGS1, PAGE = 1, fill=0x1111
Filter2_RegsFile : > RAMGS2, PAGE = 1, fill=0x2222
Filter3_RegsFile : > /*RAMGS3*/RAMGS_ALL, PAGE = 1, fill=0x3333
Filter4_RegsFile : > /*RAMGS4*/RAMGS_ALL, PAGE = 1, fill=0x4444
Difference_RegsFile : >/*RAMGS5*/RAMGS_ALL, PAGE = 1, fill=0x3333
}
/*
//===========================================================================
// End of file.
//===========================================================================
*/
MEMORY
{
PAGE 0 :
/* BEGIN is used for the "boot to SARAM" bootloader mode */
BEGIN : origin = 0x000000, length = 0x000002
RAMM0 : origin = 0x000122, length = 0x0002DE
RAMD0 : origin = 0x00B000, length = 0x000800
RAMLS0 : origin = 0x008000, length = 0x000800
RAMLS1 : origin = 0x008800, length = 0x000800
RAMLS2 : origin = 0x009000, length = 0x000800
RAMLS3 : origin = 0x009800, length = 0x000800
RAMLS4 : origin = 0x00A000, length = 0x000800
RESET : origin = 0x3FFFC0, length = 0x000002
RAMGS0 : origin = 0x00C000, length = 0x001000
RAMGS1_code : origin = 0x00D000, length = 0x000B00
RAMGS2 : origin = 0x00E000, length = 0x001000
RAMGS3 : origin = 0x00F000, length = 0x001000
RAMGS4 : origin = 0x010000, length = 0x001000
RAMGS5 : origin = 0x011000, length = 0x001000
RAMGS6 : origin = 0x012000, length = 0x001000
PAGE 1 :
BOOT_RSVD : origin = 0x000002, length = 0x000120 /* Part of M0, BOOT rom will use this for stack */
RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
RAMD1 : origin = 0x00B800, length = 0x000800
RAMGS1_data :origin = 0xDB00, length = 0x400
RAMLS5 : origin = 0x00A800, length = 0x000800
RAMGS7 : origin = 0x013000, length = 0x001000
RAMGS8 : origin = 0x014000, length = 0x001000
RAMGS9 : origin = 0x015000, length = 0x001000
RAMGS10 : origin = 0x016000, length = 0x001000
RAMGS11 : origin = 0x017000, length = 0x001000
RAMGS12 : origin = 0x018000, length = 0x001000
RAMGS13 : origin = 0x019000, length = 0x001000
RAMGS14 : origin = 0x01A000, length = 0x001000
RAMGS15 : origin = 0x01B000, length = 0x001000
CPU2TOCPU1RAM : origin = 0x03F800, length = 0x000400
CPU1TOCPU2RAM : origin = 0x03FC00, length = 0x000400
}
SECTIONS
{
codestart : > BEGIN, PAGE = 0
ramfuncs : > RAMGS0 PAGE = 0
.text : >>RAMGS0 | RAMGS1_code | RAMGS4, PAGE = 0
.cinit : > RAMGS0, PAGE = 0
.pinit : > RAMGS0, PAGE = 0
.switch : > RAMGS0, PAGE = 0
.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */
.stack : > RAMM1, PAGE = 1
.ebss : > RAMGS1_data, PAGE = 1
.econst : > RAMGS1_data, PAGE = 1
.esysmem : > RAMGS1_data, PAGE = 1
Filter_RegsFile : > RAMGS8, PAGE = 1
ramgs0 : > RAMGS1_data, PAGE = 1
ramgs1 : > RAMGS9, PAGE = 1
/* The following section definitions are required when using the IPC API Drivers */
GROUP : > CPU1TOCPU2RAM, PAGE = 1
{
PUTBUFFER
PUTWRITEIDX
GETREADIDX
}
GROUP : > CPU2TOCPU1RAM, PAGE = 1
{
GETBUFFER : TYPE = DSECT
GETWRITEIDX : TYPE = DSECT
PUTREADIDX : TYPE = DSECT
}
/* The following section definition are for SDFM examples */
Filter1_RegsFile : > RAMGS10, PAGE = 1, fill=0x1111
Filter2_RegsFile : > RAMGS11, PAGE = 1, fill=0x2222
Filter3_RegsFile : > RAMGS12, PAGE = 1, fill=0x3333
Filter4_RegsFile : > RAMGS13, PAGE = 1, fill=0x4444
Difference_RegsFile : >RAMGS14, PAGE = 1, fill=0x3333
}
/*
//===========================================================================
// End of file.
//===========================================================================
*/
Feng
updated to you:
when I use the kernel generated by the project from "C:\ti\controlSUITE\device_support\F2837xD\v170\F2837xD_examples_Dual\F2837xD_sci_flash_kernels\cup01
and set GPIO72 Low and GPIO84 High to enter SCI boot,
an error is popped up in below, means checksum does not match.
however it works well if using the default kernel provided by ti under folder"C:\ti\controlSUITE\device_support\~Utilities\serial_flash_programmer".
any difference between generated kernel and the default kernel?
Feng,
Thanks for clarifying.
So I've gone ahead and modified the thread Tags and Title - changed the part from F28379S to F28379D, since that is what you seem to be using.
It's interesting that the default kernel file in ControlSUITE works, but if you build the corresponding project, it doesn't work.
I'd request that you try a similar experiment with the latest version of C2000Ware. There's more traceability for us here.
Project: C2000Ware_3_01_00_00\device_support\f2837xd\examples\dual\F2837xD_sci_flash_kernels
Default file: C2000Ware_3_01_00_00\utilities\flash_programmers\serial_flash_programmer\f2837xD_fw_upgrade_example
I use CCSv9.3 and Compiler TI v18.12.4.LTS. I'd suggest upgrading your CCS and Compiler.
To make it quicker for you, I've attached both files here. There are differences between them - presumably because they were generated with a different CCS and/or Compiler version. But I would expect the behavior with both to be the same. The project file has _project appended, and the default file has _default.
Please let me know.
AA 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 00 00 00 00 00 41 00 D2 04 13 00 00 00 E9 C0 F2 FF 2A DB 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2A 00 00 00 00 DB 00 00 08 00 00 20 08 00 00 40 08 00 00 60 08 00 00 80 08 00 00 00 09 00 00 80 09 00 00 00 0A 00 00 80 0A 00 00 00 0B 00 00 80 0B 00 00 A0 0B 00 00 C0 0B 00 00 E0 0B 00 00 10 00 10 00 10 00 10 00 40 00 40 00 40 00 40 00 40 00 40 00 10 00 10 00 10 00 10 E9 00 00 00 00 C0 00 9A 06 00 1A 02 1F 76 6D 03 02 07 A9 8A 40 8F FF FF C4 A0 00 8F 44 01 A9 A8 02 07 A9 8A C4 CC F8 FF 05 50 A9 88 00 8F 44 01 A9 A8 02 07 A9 8A 00 B6 C4 7E 00 8F 52 01 A9 A8 02 07 A9 8A C4 C3 00 8F 44 01 A9 A8 02 07 A9 8A C4 CC F8 FF 02 50 A9 88 00 8F 44 01 A9 A8 02 07 A9 8A C4 7E 00 8F 44 01 A9 A8 02 07 A9 8A C4 CC F8 FF 05 50 A9 88 00 8F 44 01 A9 A8 02 07 A9 8A C4 7E 00 8F 60 01 A9 A8 02 07 A9 8A C4 C3 00 8F 44 01 A9 A8 02 07 A9 8A C4 CC F8 FF 02 50 A9 88 00 8F 44 01 A9 A8 02 07 A9 8A C4 7E 00 8F 44 01 A9 A8 02 07 A9 8A C4 CC F8 FF 05 50 A9 88 00 8F 44 01 A9 A8 02 07 A9 8A C4 7E 00 8F 62 01 A9 A8 02 07 A9 8A C4 C3 00 8F 44 01 A9 A8 02 07 A9 8A C4 CC F8 FF 02 50 A9 88 00 8F 44 01 A9 A8 02 07 A9 8A C4 7E 00 9A 06 00 1A 02 1F 76 6D 03 02 07 A9 8A 40 8F FF FF C4 A0 00 8F 44 01 A9 A8 02 07 A9 8A C4 CC F8 FF 05 50 A9 88 00 8F 44 01 A9 A8 02 07 A9 8A 00 B6 C4 7E 00 8F 52 01 A9 A8 02 07 A9 8A C4 C3 00 8F 44 01 A9 A8 02 07 A9 8A C4 CC F8 FF 02 50 A9 88 00 8F 44 01 A9 A8 02 07 A9 8A C4 7E 00 9A 06 00 22 76 1F 76 E0 17 1E CC 00 FF 14 50 1E 96 24 1A 01 00 20 1A 03 00 1F 76 E6 17 00 18 FD FF 00 18 FE FF 1F 76 E0 17 00 CC FF F0 A9 1A 00 03 00 96 1F 76 E6 17 00 1A 02 00 00 1A 01 00 1F 76 EC 17 00 CC F0 FF 0A 50 00 96 1A 76 07 F6 00 77 69 FF 06 00 22 76 1F 76 E0 17 1E CC 00 FF 14 50 1E 96 20 18 FC FF 24 18 FE FF 1A 76 69 FF 06 00 02 FE 41 96 25 76 69 FF 82 FE 06 00 01 19 C3 56 FF FF 06 00 FE 0E 00 00 FC C0 1B 76 F0 FF 00 E2 BD 00 30 E6 00 06 42 29 16 56 25 76 00 6F 1B 76 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0F 0B 68 1F 76 6C 03 2A 92 07 60 BF 56 2A 01 08 8F 00 00 EF FF 04 01 08 8F 00 20 A9 A8 42 0F 10 66 08 8F FF 3F A9 A8 42 0F 0B 68 1F 76 6C 03 2B 92 07 60 BF 56 2B 01 08 8F 00 20 EF FF F0 00 08 8F 00 40 A9 A8 42 0F 10 66 08 8F FF 5F A9 A8 42 0F 0B 68 1F 76 6C 03 2C 92 07 60 BF 56 2C 01 08 8F 00 40 EF FF DC 00 08 8F 00 60 A9 A8 42 0F 10 66 08 8F FF 7F A9 A8 42 0F 0B 68 1F 76 6C 03 2D 92 07 60 BF 56 2D 01 08 8F 00 60 EF FF C8 00 08 8F 00 80 A9 A8 42 0F 10 66 08 8F FF FF A9 A8 42 0F 0B 68 1F 76 6C 03 2E 92 07 60 BF 56 2E 01 08 8F 00 80 EF FF B4 00 09 8F 00 00 A9 A8 42 0F 10 66 09 8F FF 7F A9 A8 42 0F 0B 68 1F 76 6C 03 2F 92 07 60 BF 56 2F 01 09 8F 00 00 EF FF A0 00 09 8F 00 80 A9 A8 42 0F 10 66 09 8F FF FF A9 A8 42 0F 0B 68 1F 76 6C 03 30 92 07 60 BF 56 30 01 09 8F 00 80 EF FF 8C 00 0A 8F 00 00 A9 A8 42 0F 0F 66 0A 8F FF 7F A9 A8 42 0F 0A 68 1F 76 6C 03 31 92 06 60 BF 56 31 01 0A 8F 00 00 78 6F 0A 8F 00 80 A9 A8 42 0F 0F 66 0A 8F FF FF A9 A8 42 0F 0A 68 1F 76 6C 03 32 92 06 60 BF 56 32 01 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4F 92 0E 52 06 60 01 29 4D 25 4E AF 44 1E 32 6F 04 52 09 60 42 06 40 76 45 CF 01 29 4D 25 4E AF 44 1E 28 6F 07 52 05 60 42 06 40 76 45 CF 1A 6F 3A 28 00 50 1F 76 6C 03 4F 92 06 D5 00 8F 3C DB 3A 93 40 76 E1 D0 00 52 F6 60 AD 5C AD 5D 90 DC 8E DD A4 5C A5 5D 40 76 D3 D1 4F 96 0F 52 E0 FF 63 FF 22 76 1F 76 C0 01 22 2B BF 56 29 28 1A 76 00 6F 98 FE 06 00 06 FE 45 7D 44 97 43 96 42 A8 40 76 11 D0 3D 8F FE 08 A9 A8 40 76 E5 C0 A9 28 E4 1B 40 76 2E D1 45 92 40 76 2E D1 1F 76 6C 03 38 2B 43 92 40 76 2E D1 44 92 40 76 2E D1 46 2B 09 6F 01 3B 46 85 42 07 A9 8A C4 92 40 76 2E D1 46 0A 45 92 FE 9C C0 FF 46 54 F4 66 40 76 16 D1 A9 28 1B E4 40 76 2E D1 40 76 00 D0 86 FE 06 00 1F 76 6C 03 38 C6 1F 76 C8 01 09 3C 40 76 11 D0 40 76 00 D0 1F 76 6C 03 38 92 1F 76 C8 01 C7 FF 09 93 A8 3C 09 97 40 76 11 D0 40 76 00 D0 06 00 02 FE 41 96 1F 76 C8 01 09 93 A8 3C 09 97 FF 90 1F 76 6C 03 38 72 40 76 11 D0 40 76 00 D0 41 92 09 93 C7 FF A8 3C 09 97 1F 76 6C 03 41 CC 00 FF C7 FF 38 72 40 76 11 D0 40 76 00 D0 82 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03 08 92 FA 96 FA 92 01 9C 00 BE 03 56 A9 01 A9 80 42 C3 0A 0E 44 C2 41 76 62 04 0C D0 92 1E 1F 76 6D 03 00 BE 03 56 0A 04 FA 93 01 9D A8 80 42 C3 A9 0E 44 C2 41 76 62 04 0A D0 92 1E 26 D0 92 CC FF 0F 0C D0 A9 0E 92 0F 05 67 F2 28 F8 01 EF FF E8 01 16 02 AD 5C 42 1E E6 DC 10 02 41 76 86 05 36 D0 92 0F 05 EC F2 28 F6 01 EF FF DA 01 1F 76 6D 03 02 8A D4 18 FD FF 02 8A 00 9A 01 90 02 DC C4 CD FE FF A8 CA C4 96 00 8F 44 01 02 06 01 56 A4 00 C4 CC F8 FF 05 50 C4 96 0A D0 92 06 2C D0 42 1E 92 0E 41 76 79 05 1F 76 6D 03 02 8A 00 8D 20 01 94 96 0A D0 92 06 2E D0 42 1E 92 06 41 76 79 05 1F 76 6D 03 02 8A 00 8D 22 01 94 1E 0A D0 92 06 23 D0 42 1E 92 92 FF 90 A9 0E 41 76 79 05 1F 76 6D 03 00 8F 10 01 A6 1E 02 06 01 56 A4 00 A6 92 C4 93 A8 3C C4 97 0A D0 92 06 25 D0 42 1E 92 CC 00 FF C7 FF A9 0E 41 76 79 05 1F 76 6D 03 00 8F 14 01 A6 1E 02 06 01 56 A4 00 A6 92 C4 93 A9 39 C4 97 0A D0 92 06 27 D0 42 1E 92 CC 00 FF C7 FF A9 0E 41 76 79 05 1F 76 6D 03 02 8A 00 8D 16 01 94 96 0A D0 92 06 24 D0 42 1E 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00 FE 0A 00 00 00 D0 02 FE 1F 76 C8 01 05 CC 40 00 C5 FF 01 52 FA 60 07 C6 41 96 2D 52 03 61 01 9A 02 6F 00 9A 82 FE 06 00 1F 76 C8 01 04 46 FD 6C 06 00 18 FE 42 1E 1F 76 40 17 20 92 01 90 01 52 05 61 00 02 01 19 EF FF BF 00 00 8F 95 D1 1F 76 6C 03 2A A8 42 06 40 76 4E D1 40 76 73 D1 AD 5C AD 5D 90 DC 8E DD A4 5C A5 5D 40 76 D3 D1 4F 96 0F 52 E1 FF A1 00 1F 76 6C 03 3C 28 00 10 A9 28 78 56 A8 28 34 12 3E 1E 3A 2B 4F 92 0A 52 1F 60 01 29 4D 25 4E AF 52 1E 4B 25 4C AF 54 1E 49 25 4A AF 56 1E 47 25 48 AF 58 1E 1F 76 C0 17 52 06 10 1E 54 06 12 1E 56 06 14 1E 58 06 16 1E 19 45 63 6D 1F 76 6C 03 3C 28 00 60 5E 6F 0B 52 1F 60 01 29 4D 25 4E AF 52 1E 4B 25 4C AF 54 1E 49 25 4A AF 56 1E 47 25 48 AF 58 1E 1F 76 C1 17 52 06 10 1E 54 06 12 1E 56 06 14 1E 58 06 16 1E 19 45 43 6D 1F 76 6C 03 3C 28 00 60 3E 6F A9 28 00 01 4F 54 0E 60 42 06 40 76 EF CE 44 1E 1F 76 6C 03 A9 28 00 10 3C 54 30 60 44 06 3E 1E 2D 6F A9 28 00 03 4F 54 08 60 01 29 4D 25 4E AF 52 1E 41 76 00 03 22 6F A9 28 00 05 4F 54 04 60 40 76 9B D8 1B 6F 4F 92 0E 52 06 60 01 29 4D 25 4E AF 44 1E 32 6F 04 52 09 60 42 06 40 76 29 CF 01 29 4D 25 4E AF 44 1E 28 6F 07 52 05 60 42 06 40 76 29 CF 1A 6F 3C 28 00 50 1F 76 6C 03 4F 92 06 D5 00 8F 3E DB 3C 93 40 76 E1 D0 00 52 F6 60 AD 5C AD 5D 90 DC 8E DD A4 5C A5 5D 40 76 D3 D1 4F 96 0F 52 E0 FF 63 FF 22 76 1F 76 C0 01 22 2B BF 56 29 28 1A 76 00 6F 98 FE 06 00 06 FE 45 7D 44 97 43 96 42 A8 40 76 11 D0 3D 8F FE 08 A9 A8 40 76 E5 C0 A9 28 E4 1B 40 76 2E D1 45 92 40 76 2E D1 1F 76 6C 03 3A 2B 43 92 40 76 2E D1 44 92 40 76 2E D1 46 2B 09 6F 01 3B 46 85 42 07 A9 8A C4 92 40 76 2E D1 46 0A 45 92 FE 9C C0 FF 46 54 F4 66 40 76 16 D1 A9 28 1B E4 40 76 2E D1 40 76 00 D0 86 FE 06 00 1F 76 6C 03 3A C6 1F 76 C8 01 09 3C 40 76 11 D0 40 76 00 D0 1F 76 6C 03 3A 92 1F 76 C8 01 C7 FF 09 93 A8 3C 09 97 40 76 11 D0 40 76 00 D0 06 00 02 FE 41 96 1F 76 C8 01 09 93 A8 3C 09 97 FF 90 1F 76 6C 03 3A 72 40 76 11 D0 40 76 00 D0 41 92 09 93 C7 FF A8 3C 09 97 1F 76 6C 03 41 CC 00 FF C7 FF 3A 72 40 76 11 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52 04 ED 40 76 02 C0 03 6F 40 76 79 C0 1F 76 6D 03 02 8A 18 DC C4 18 FE FF 00 9A 82 FE 06 00 1F 56 22 76 C0 B9 29 28 68 00 1A 76 41 76 96 03 CF 56 02 00 AD 28 00 04 BD 2B BD 2B BD 1E 07 00 33 56 AC 1E A9 58 A9 59 A9 5A A9 5B A9 5C A9 5D A9 88 A9 80 1F 76 00 00 BD 2B BD 28 0B 0A 00 76 13 76 06 00 06 FE 41 96 44 A8 45 2B 44 06 30 FF 44 1E 41 92 08 52 05 ED 45 28 00 02 45 92 11 6F 10 9A 41 76 0A 04 41 92 41 76 85 04 1F 76 6D 03 02 8A 88 D0 44 06 94 1E 41 92 41 76 0A 04 00 9A 86 FE 06 00 00 52 AB A8 A4 8E 08 61 A9 80 81 DF A7 88 85 80 80 7F 0E 00 FE FF A9 88 A6 0F 0F 61 00 53 0D 61 FF 9D A8 5C BF 76 FE FF 85 92 80 96 0E 00 FE FF 85 92 80 96 0C 00 F8 FF A4 A9 06 00 02 FE 42 1E 1F 76 6D 03 0A 0E AC 1E 65 56 42 00 42 A9 42 06 09 EC 42 06 0A EC 01 02 41 56 42 00 42 06 FC ED 04 6F A9 28 F4 01 02 6F 00 9A 82 FE 69 FF 06 00 41 C1 42 C0 44 06 AA CF AB CE 5A FF 42 06 20 76 41 99 42 98 44 06 AA CB AB CA 5A FF 42 06 20 76 41 F3 42 F2 44 06 AA 71 AB 70 5A FF 42 06 20 76 02 FE 08 8F 00 20 C4 06 42 1E 08 8F 00 21 C4 06 42 1E 08 8F 00 22 C4 06 42 1E 08 8F 00 23 C4 06 42 1E 01 02 41 76 07 05 82 FE 06 00 0A FE 4A A0 48 1E 46 A8 4A 06 42 1E BF 56 43 02 4E 83 46 8A 48 06 41 76 81 02 8A FE 06 00 04 FE 42 1E 48 87 01 29 44 56 42 00 45 FF 44 1E 40 76 00 C0 44 06 84 FE 06 00 58 FF A4 C5 09 61 01 19 A6 1E 00 02 81 DE 87 7D 01 19 A6 0F FB 60 06 00 04 FE 44 1E 42 A8 42 06 44 07 A9 8A 48 92 40 76 CF CF 84 FE 06 00 1F 76 6D 03 02 8A 2A D0 94 48 03 EF 01 9A 02 6F 02 9A 06 00 00 00
Thanks,
Sira
Chris,
link to my post so we can go in circles: https://e2e.ti.com/support/microcontrollers/c2000/f/171/p/900716/3336785#3336785
You should look at the kernel linker cmd file and the app that calls the SCI boot. It is likely they at least sharing the same stack memory (look in the SECTIONs part of the linker cmd file). Try re-assiging one of those to a different location.
I tried flashing blinky_cpu01 since this is test code that should work with the serial flash programmer and I got stuck at the same spot where it says attempting autobaud to send function message
The next step since I also have a launchpad with the same processor on it was to turn the Boot switches on the launchpad to on, off, off so it will boot from SCI and run the serial flash programmer on it. this time I was stopped at the first attempting autobaud to load kernel. so it never sends the hex data at all. I am trying to communicate from the USB port that powers the device. am I doing this wrong? should I be sending the UART through header pins?
Trevor,
The F28379D Launchpad is not capable of using the SCI Boot mode (see 2.1 of sprui77). However, the F28379D ControlCARD has this feature (and there's a tweak necessary there as well - mentioned in 2.1 of sprui76).
I'm not sure the F28379S Kernel file will work on it.
I presume you are referring to the F28379S Launchpad?
The F28379S doesn't have a ControlCARD, and its Launchpad (sprui25) doesn't mention anything about the availability or lack of an SCI Boot mode, but it seems very similar to me, and I would suspect the same might be true.
Thanks,
Sira
Sira,
Oh I am sorry I should have clarified. I am working with the LaunchpadXL-F2877S with information here: http://www.ti.com/lit/ug/sprui25d/sprui25d.pdf
I assumed I could do this because of this:
I can stop running down this path if it is not going to get me anywhere. I just hoped I could make this problem as simple as possible and take out as many variables as possible.
Thanks,
Trevor
Trevor,
Yes, definitely simplifying the problem will help.
I see pretty much the same circuit on the F28379D Launchpad as well. On the spru77, it says "The SCIA pins routed to the XDS100 v2 are not valid SCI boot mode pins. In addition, the other bootable SCI pins are not routed to any external connector. In other words, this LaunchPad is not capable of using the Boot to SCI boot mode."
I am wondering if the same problem exists on the F28377S Launchpad as well, and if just the note is missing.
However, I just did an e2e search and it seems to me like others have tried (successfully) SCI Boot mode on the F28377S Launchpad.
https://e2e.ti.com/support/microcontrollers/c2000/f/171/t/493597
An interesting clue from there as well. It points to this line of code in F2837xS_sci_flash_kernel.c
//
// parameter SCI_BOOT for GPIO84,85; parameter SCI_BOOT_ALTERNATE for
// GPIO28,29
//
EntryAddr = SCI_GetFunction(SCI_BOOT_ALTERNATE);
Something to switch and try.
The post also mentions an App (Download project) from TI to try. You'll have to add a post build step to convert the .out to .txt.
Kernel project:
C:\ti\controlSUITE\device_support\F2837xS\v180\F2837xS_examples_Cpu1\F2837xS_sci_flash_kernel
Download project:
C:\ti\controlSUITE\development_kits\LAUNCHXL-F28377S\LaunchPadDemo
Thanks,
Sira
Thank you Sira,
Those lines of code were my issue. now I have the DFU working but I need to figure out how to make it run properly.
also the link that you sent was to a resolved E2E post put the answer on that post was a dead link. just as an FYI if you can tell them to go back and fix it.
Thanks,
Trevor
Trevor,
That's good news. But what do you mean by "figure out how to make it run properly"?
Thanks for the heads up on the other post.
Sira
Feng,
Likewise, in your case, I see you are calling SCI_Boot(0). Is 0 a valid argument? Valid arguments are SCI_BOOT and SCI_BOOT_ALTERNATE.
//
// parameter SCI_BOOT for GPIO84,85; parameter SCI_BOOT_ALTERNATE for
// GPIO28,29
Thanks,
Sira
Hi Sira,
I also notice this and change it to 1 from 0 , that means SCI_BOOT. but the result keeps the same failed.
Now I upgrade the CCS version and try according to your suggest. it takes some time.
Will update to you all soon.
Feng
Hi Sira,
updated to you:
after upgrade CCS and C200Ware to the version you mentioned above, I can get the correct result and SCI boot is successful.
let me describe more detail in below:
1. branch SCI boot by gpio72 low and gpio84 high,
result:
the default kernel (F2837xD_sci_flash_kernels.txt)and default app (blinky_dc_cpu01.txt) to be downloaded is under C2000Ware_3_01_00_00\utilities\flash_programmers\serial_flash_programmer\f2837xD_fw_upgrade_example
generated kernel(called F2837xD_sci_flash_kernels_feng.txt) is under C2000Ware_3_01_00_00\device_support\f2837xd\examples\dual\F2837xD_sci_flash_kernels
generated app to be downloaded(called blinky_dc_cpu01_feng.txt) is under C2000Ware_3_01_00_00\device_support\f2837xd\examples\dual\blinky_dc
default kernel default app--------->OK
generated kernel default app--------->OK
default kernel generated--------->OK
generated kernel generated app--------->OK
2 branch SCI boot by function call in flash, and use an io to trigger and enter the SCI_Boot(1) function call.
result;
a. failed, the error is in below:
b. success: after debug, if I delete the codes, then it is okay now,
code to be delete:
Epwm1Regs.TBRRD = (Uint16)MPeriod;
Epwm2Regs.TBRRD = MPeriod;
Epwm3Regs.TBRRD = MPeriod;
and the successful result is in below:
3. so my question is why the three codes cause the boot fail? is there any difference with other code?
Note: the three line codes are called in an PWM interrupt with 8k hz interval
Look forward to your reply.
Feng
Feng,
That is very strange indeed. Where are these 3 lines of code (in which function) relative to the SCI_Boot(1) call? I believe this is running from Flash, and MPeriod should be in RAM, so there should be no conflict, right?
What made you delete these lines of code?
Even in the case where you said it went through successfully, it prints "Error Status" and "Error Address".
Thanks,
Sira
Hi, Sira
Pls find my reply in below:
That is very strange indeed. Where are these 3 lines of code (in which function) relative to the SCI_Boot(1) call? I believe this is running from Flash, and MPeriod should be in RAM, so there should be no conflict, right?.
Feng:it is called in pwm ISR function call. and SCI_Boot(1) is called in Main() loop.
Yes, it runs in flash.
Mperiod is a global variable. Actually, there are also many similar global variables also called in the ISR function call.
What made you delete these lines of code?
Feng: I debug step by step to commentary and finally found it becomes okay if I delete the three lines.
Even in the case where you said it went through successfully, it prints "Error Status" and "Error Address".
Feng: no, it has no any response shown in my previous reply and it happens when the kernels is being downloaded.
Any comment about this or how to debug it?
Feng
Hi Feng,
So does this completely solve the problem?
Do you normally have the WD enabled?
Give me a day to look more closely into the Flash kernel code to see what the connection might be.
Thanks,
Sira
Hi Sira,
So does this completely solve the problem?
Feng: currently, I can only judge it runs correct by led. So actually I do not know whether it works totally normal or not. Since right now, all the peripherals are not connected and our motor driver board is not ready, so I can not run motor. But will do it later.
Do you normally have the WD enabled?
Feng: yes I normally have the WD enabled. During the debug, I found I have to disable the isr function together to let sci_boot works. Only disable the WD will cause the problem I mentioned in privious reply happen during download the kernels. I don't understand this.
Thanks,
Feng
Feng,
I was trying to analyze the situation:
In F2837xD SCI Flash kernel, Interrupts are DISABLED in main() of SCI Kernel. The SCI command is detected by the device by polling.
So:
SCI Boot -> SCI kernel running from RAM -> Polls for commands from host -> programs Application in Flash when cmd received (through SCI_Boot() call) – Works OK for you
Now, with
Flash boot:
I presume Interrupts are ENABLED in your main().
Polls for command from Host -> command received from host -> SCI_Boot(1) is called, I presume this function is running from RAM so that it can update Flash (or the Flash APIs are running from RAM) -> programs app in Flash (if interrupts occur during this process, like ePWM, do those ISRs execute from RAM?).
Thanks,
Sira
Feng,
A little more analysis here:
SCI Boot Mode case is simple - Kernel in RAM updates App in Flash. Interrupts are disabled because App is not running.
Flash Boot case is a little more involved
- You boot to Flash, App is running with interrupts enabled. Now you want to call SCI_Boot(1) to update App in Flash. This means that App has to stop running and interrupts have to be disabled. This is assuming you are updating the same Flash bank, and you are not using Dual-bank Flash (that is a different scenario altogether). So disabling interrupts makes sense. Now if you have the Watchdog enabled, it must be serviced periodically to prevent it from resetting the device. That presumably happens through a Timer interrupt or something. So if you have interrupts disabled, that is a problem. So the Watchdog also needs to be disabled.
This is how I am looking at it.
Thanks,
Sira
Hi Sira,
thanks for your explanation.
how to check whether ISRS execute from RAM or FLASH? the CMD file I used is called 2837xD_FALSH_Ink_cpu1.cmd.
And does it mean that ISRS does not have to be disabled if it executes from FALSH?Pls advise.
Feng
Feng,
You just need to look at the .map file and look for the ISR in it, and check if it is assigned a RAM or FLASH address. Sometimes, they will copied to RAM at load time. That will reflect in the .map file.
Thanks,
Sira
Feng,
That confirms it then. You're updating the Flash application, so you can't be running those functions.
Let me know how else I can help or if we can close the issue. Please mark as Resolved answer.
Thanks,
Sira
Hi Sira,
Thanks very much for your good help and nice support .
Last thing, actually I need USB boot in my application. Sci boot is only tested because of easy debug, I think.
Per my understanding, USB boot shall be much similar as Sci boot, right? I will test it later.
And update you then if any problem.
Feng
Feng,
You're welcome!
I am not familiar with USB boot, I would suggest you refer to spraco7. I would expect a similar flow as SCI boot.
For now, I request you to mark this issue as resolved.
Thanks,
Sira
Hi Sira,
today i try to recover sci flash kernels since successful test last time, an new error is trigger
all setting keeps the same as before, same board,same version of ccs.so i have no ideal about this.
i search from e2e forum, most of the threads said that the error "atteampting autobaud to load kernel..." means sci gpio is not correct.
but for my case, i am using the same board, same kernel as before, which was successful.
pls help.
Feng
