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Customer select TZ pin as PWM protection source, set PWM output low in TZ event, and enable TZ working in CBC mode. Every PWM period interrupt, customer will clear the TZ CBC flag.
Mostly time TZ protection logical is working normal, but customer capture a abnormal waveform that PWM output low in several continue cycles while TZ is alwasys high. Do you think any possible reason for abnormal behavior? below is the capture waveform for reference.
Yellow -> TZ pin signal; Green -> PWM pin signal; Blue -> Current signal;
The abnormal is marked as red circle, which PWM (Green) output low in several continue cycles while TZ (Yellow) is alwasys high.
Terry,
The CBC trip will not remain constant across PWM periods. It should automatically clear. Is it possible that the customer has accidently configured a OSHT trip? One shot trips need to be cleared by the user.
Sometimes customers will have issues when configureing the trip behavior to "high-z" mode, because the signal will simply follow any pull downs during this time. You will need to look at how their TZs are configured. Please also check how the Digital compare sub-module is configured, it too can cause similar behavior, but has lower priority than the TZ.
Regards,
Cody
Hi Cody
Thanks your confirm. I work with customer to check their firmware and finial find the reason that their algorithm will calculate the PWM duty to be zero in some special condition, so that PWM output looks disappear (duty as zero) even if TZ resume high level.