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I'm trying to build a 28035 system. I want to use the internal clock ofthe processor and its internal voltage regulator. Some of the important pins are:
- XRS is connected to 3.3 V
- VREGENZ is connected to GND
- TRST is pulled to GND through a 4.7K resistor
- pins X1, X2 not connected
- GPIO18 is pulled to 3.3V through a 4.7K resistor
- GPIO19 is pulled to 3.3V through a 4.7K resistor
- GPIO34 is pulled to 3.3V through a 4.7K resistor
- TDO, TRST,TDI,TCK and TMS are connected to a XDS510LC emulator
- EMU0 and EMU1 are pulled to 3.3V through a 4.7K resistor (these are on the emulator side)
- all VDD and VSS are connected to 3.3V and GND respectively
I'm trying to start emulation (through Code Composer 3.3, just like I do with my Picollo COntrol Card) and I'm getting the following error:
"Error connecting to the target: Error 0x80000200/-2082 Fatal Error during: OCS, Device driver: Emulation Connection
Loss Detected on Target CPU. It is recommended to RESET EMULATOR. This will disconnect each target from the emulator. The targets should then be power cycled or hard reset followed by an emureset and reconnect to each target. "
Can anyone help? Is there anything unusual in the hardware that would cause such problem? To me, it seems that the hardware is quite similar to the one one the docking station/control card (except for the GPIO18,19,34 being pulled high and the EMU0,1 being connected high - used this in the 24xx series). How does one debug this?
There's more to my original problem. I jumpered a XD100 emulator (from the Picollo eval board)to try different emulation. I also probed the JTAG signals. When trying to connect to the target, they all show signals similar to the ones from the eval board.
However, I am getting a different error message:
" Failed Software Reset:
Error 0x00000024/-1137
Error during: Register, Execution,
It appears that the target is being held in reset. This may be due to Wait-In-Reset (WIR) configuration set by the EMU0=0 and EMU1=1 pin settings. If this is the case, DISCONNECT all CONNECTED devices including icepick and then select RETRY to clear the WIR configuration."
EMU0 and EMU1 aren't even connected in this emulation mode. However, I noticed that my XRS pin is continuously low (continuous REST condition). It is this way even without the emulator connected.
So here's the new question:
- what could keep the processor in a continuous RESET? (that even the emulator can not break). I would have expected that the RESET go low/high periodically as the watch-dog tries to periodically reset the processor (which it does in the eval board in the absence of code)
- is there any hardware condition that keeps the RESET low at all times?
Recently I had the same problem, in my case i kept VREG pulled to ground using 4.7K since i am using internal regulator. After facing this problem I connected 2.2uF cap to all Vddio and Vdd, and the problem is gone. Looks like to me that the internal supply was unstable prior to using this cap. I am not sure whether you are using internal supply or providing external one.
I also realized that EMU0 and EMU1 do not need any pull up, it works fine even if they are not biased in the board for piccolo processor.