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Compiler/TMS320F28379D: Illegal Operation when switching from Coff to EABI output format

Part Number: TMS320F28379D
Other Parts Discussed in Thread: LAUNCHXL-F28379D, C2000WARE

Tool/software: TI C/C++ Compiler

Hello TI Experts,

I am working with the TMS320F28379D microcontroller using the LAUNCHXL-F28379D launchpad, the latest version of CCS (Version: 10.0.0.00010) with compiler version v20.2.0.LTS.

When I select output format legacy COFF everything works fine but when I switch to eabi (ELF) an illegal_operation_interrupt occurs.

It happens when the following assembly line is executed:

3E67    LCR    *XAR7

Any idea what is going wrong and how to fix it? 

Kind Regards,

Dominik

  • Hi Dominik,

    Is this C2000ware example or your custom application?

    I will recommend to download latest C2000ware and try one of the example. 

  • Hi Santosh,

    it is based off the empty_project driverlib example but I added my custom code.

    Regards,

    Dominik

  • Dominik,

    Did you put the break-point in your custom code and check where it crashes?

    Are you using C2000ware 3.01.00.00 ?

  • Santosh, 

    Yes, I am using C2000ware 3.01.00.00.

    The program crashes right after initialization. After download, the program is halted at the start of the main routine. I can go stepwise through the code until I reach a function pointer call, pointing to a custom function  in another file.

    Interestingly, the problem with the elegal operation does not occur when the interrupt of Ecap modul 3 (which I am using) is disabled. 

    Then I can also run the programm with the eabi output file format. 

    Any ideas or more suggestions what I could try?

    Greetings,

    Dominik

  • Dominik,

    Can you share code snippet which is causing the issue? Please check the address of function pointer? 

  • Hi Santosh,

    I will proivde a minimum working example shortly.



  • Dominik,

    Any update on this? are you able to resolve the issue?

  • Dear Santosh,

    thanks for asking. I am working with the legacy COFF setting for now which seems to work fine. 

    Unfortunately, I couldn't isolate the issue and provide you with a code snippet for further exploration of the problem.

    I ran into another problem concerning the EPWM interrupt generation. At the start of my ISR, I am setting GPIOs to monitor the handling of the ISR on the scope. 

    I am using two EPWM modules to generate a burst-mode operation to output a defined number of high-frequency pulses with a specific repetition rate (low frequence timer). 

    I am setting the compare register and use a counter which is decremented to keep track of the generated pulses in the ISR of the high frequency PWM module. If the desired number of pulses is generated (counter < 1)I am stopping to clear the interrupt flag and the pulse generation stops.

    The second PWM (configured at a much lower frequency) is (re)setting the counter variable and clear the interrupt flag from the high frequency PWM and the process starts again.

    This works quite well, however it seems that once the flag is cleared there is immediately an interrupt generated (2 interrupts directly one after another)


    Yellow: GPIO test pin set at start and cleared at end of high-frequency ISR

    Blue: generated PWM


    Any idea what could be the reason for that? The problem is that the generated number of pulses varies from time to time since the counter is decremented already but no pulse is generated (b/c of shadow registers).

    Looking forward to hear your thoughts.

    Thanks,

    Dominik

  • Dominik,

    As this is question on different topic, it will be better if we can close this thread, and create a new thread so that it can be directed to right expert.