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LAUNCHXL-F28379D: Standalone Bootup From Flash

Curtis Prehn
Intellectual 350 points
Part Number: LAUNCHXL-F28379D
Other Parts Discussed in Thread: C2000WARE

Hello,

I'd like to have the processor boot from internal flash memory upon being powered up.

Code Composer Studio
 Version: 9.0.1.00004

OS: Windows 10, v.10.0, x86_64 / win32
Java version: 1.8.0_144

  • I've changed the project configuration from RAM to FLASH.
  • My program calls InitSysCtrl() first in main()
  • I've tried powering up the board with boot pin 3 low.
  • I've run the EMU_BOOT_FLASH script while the program was haulted in the debugger.

What am I missing to run the application in standalone without the need to be connected to the debugger?


Thanks!

  • 0
    TI__Genius 17315 points

    Curtis,

    To learn more about flash programming, please see module 10 lab exercise in the F2837xD workshop at:

    https://training.ti.com/c2000-f2837xd-microcontroller-workshop?context=1137791-1137781

    I hope this helps. If this answers your question, please click the green "Verified Answer" button. Thanks.

    - Ken

  • 0 in reply to Ken Schachter
    Intellectual 350 points

    Ken,

    I've checked out that workshop lab, and running that particular example, I'm able to boot from flash.  However, when using an example from C2000Ware 3.02.00.00 and following the steps described in the lab, I'm unable to get the program to boot from flash.

    At step 19, I'm able to start the program with Go Main and without Go Main.  At this point, according to the lab, flash booting should be confirmed.  Unfortunately when I disconnect the USB and then reconnect, the program doesn't run.

    Here's my linker file.

    MEMORY
{
PAGE 0 :  /* Program Memory */
          /* Memory (RAM/FLASH) blocks can be moved to PAGE1 for data allocation */
          /* BEGIN is used for the "boot to Flash" bootloader mode   */

   BEGIN           	: origin = 0x080000, length = 0x000002
   RAMM0           	: origin = 0x000123, length = 0x0002DD
   RAMD0           	: origin = 0x00B000, length = 0x000800
   RAMLS0          	: origin = 0x008000, length = 0x000800
   RAMLS1          	: origin = 0x008800, length = 0x000800
   RAMLS2      		: origin = 0x009000, length = 0x000800
   RAMLS3      		: origin = 0x009800, length = 0x000800
   RAMLS4      		: origin = 0x00A000, length = 0x000800
   RAMGS14          : origin = 0x01A000, length = 0x001000     /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
   RAMGS15          : origin = 0x01B000, length = 0x000FF8     /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */

//   RAMGS15_RSVD     : origin = 0x01BFF8, length = 0x000008    /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */

   RESET           	: origin = 0x3FFFC0, length = 0x000002

   /* Flash sectors */
   FLASHA           : origin = 0x080002, length = 0x001FFE	/* on-chip Flash */
   FLASHBCD           : origin = 0x082000, length = 0x006000	/* on-chip Flash */
//   FLASHB           : origin = 0x082000, length = 0x002000	/* on-chip Flash */
//   FLASHC           : origin = 0x084000, length = 0x002000	/* on-chip Flash */
//   FLASHD           : origin = 0x086000, length = 0x002000	/* on-chip Flash */
   FLASHE           : origin = 0x088000, length = 0x008000	/* on-chip Flash */
   FLASHF           : origin = 0x090000, length = 0x008000	/* on-chip Flash */
   FLASHG           : origin = 0x098000, length = 0x008000	/* on-chip Flash */
   FLASHH           : origin = 0x0A0000, length = 0x008000	/* on-chip Flash */
   FLASHI           : origin = 0x0A8000, length = 0x008000	/* on-chip Flash */
   FLASHJ           : origin = 0x0B0000, length = 0x008000	/* on-chip Flash */
   FLASHK           : origin = 0x0B8000, length = 0x002000	/* on-chip Flash */
   FLASHL           : origin = 0x0BA000, length = 0x002000	/* on-chip Flash */
   FLASHM           : origin = 0x0BC000, length = 0x002000	/* on-chip Flash */
   FLASHN           : origin = 0x0BE000, length = 0x001FF0	/* on-chip Flash */

//   FLASHN_RSVD     : origin = 0x0BFFF0, length = 0x000010    /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */

PAGE 1 : /* Data Memory */
         /* Memory (RAM/FLASH) blocks can be moved to PAGE0 for program allocation */

   BOOT_RSVD       : origin = 0x000002, length = 0x000121     /* Part of M0, BOOT rom will use this for stack */
   RAMM1           : origin = 0x000400, length = 0x0003F8     /* on-chip RAM block M1 */
//   RAMM1_RSVD      : origin = 0x0007F8, length = 0x000008     /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
   RAMD1           : origin = 0x00B800, length = 0x000800

   RAMLS5      : origin = 0x00A800, length = 0x000800

   RAMGS0      : origin = 0x00C000, length = 0x001000
   RAMGS1      : origin = 0x00D000, length = 0x001000
   RAMGS2      : origin = 0x00E000, length = 0x00C000
//   RAMGS3      : origin = 0x00F000, length = 0x001000
//   RAMGS4      : origin = 0x010000, length = 0x001000
//   RAMGS5      : origin = 0x011000, length = 0x001000
//   RAMGS6      : origin = 0x012000, length = 0x001000
//   RAMGS7      : origin = 0x013000, length = 0x001000
//   RAMGS8      : origin = 0x014000, length = 0x001000
//   RAMGS9      : origin = 0x015000, length = 0x001000
//   RAMGS10     : origin = 0x016000, length = 0x001000

//   RAMGS11     : origin = 0x017000, length = 0x000FF8   /* Uncomment for F28374D, F28376D devices */

//   RAMGS11_RSVD : origin = 0x017FF8, length = 0x000008    /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */

//   RAMGS11     : origin = 0x017000, length = 0x001000     /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
//   RAMGS12     : origin = 0x018000, length = 0x001000     /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
//   RAMGS13     : origin = 0x019000, length = 0x001000     /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */

   CPU2TOCPU1RAM   : origin = 0x03F800, length = 0x000400
   CPU1TOCPU2RAM   : origin = 0x03FC00, length = 0x000400
}

SECTIONS
{
   /* Allocate program areas: */
   .text               : >> FLASHBCD /*FLASHB | FLASHC | FLASHD | FLASHE*/      PAGE = 0, ALIGN(4)
   .cinit              : > FLASHBCD      PAGE = 0, ALIGN(4)

   codestart           : > BEGIN       PAGE = 0, ALIGN(4)
   /* Allocate uninitalized data sections: */
   .stack              : > RAMM1       PAGE = 1
   .switch             : > FLASHBCD      PAGE = 0, ALIGN(4)
   .reset              : > RESET,      PAGE = 0, TYPE = DSECT /* not used, */

#if defined(__TI_EABI__)
   .init_array         : > FLASHBCD,       PAGE = 0,       ALIGN(4)
   .bss                : > RAMLS5,       PAGE = 1
   .bss:output         : > RAMLS3,       PAGE = 0
   .bss:cio            : > RAMLS5,       PAGE = 1
   .data               : > RAMLS5,       PAGE = 1
   .sysmem             : > RAMLS5,       PAGE = 1
   /* Initalized sections go in Flash */
   .const              : > FLASHBCD,       PAGE = 0,       ALIGN(4)
#else
   .pinit              : > FLASHBCD,       PAGE = 0,       ALIGN(4)
   .ebss               : >> RAMLS5 | RAMGS0 | RAMGS1,    PAGE = 1
   .esysmem            : > RAMLS5,       PAGE = 1
   .cio                : > RAMLS5,       PAGE = 1
   /* Initalized sections go in Flash */
   .econst             : >> FLASHBCD      PAGE = 0, ALIGN(4)
#endif

   Filter_RegsFile     : > RAMGS0,	   PAGE = 1

   SHARERAMGS2		: > RAMGS2,		PAGE = 1
//   SHARERAMGS1		: > RAMGS1,		PAGE = 1
   ramgs0           : > RAMGS0,     PAGE = 1
   ramgs1           : > RAMGS1,     PAGE = 1

#ifdef __TI_COMPILER_VERSION__
    #if __TI_COMPILER_VERSION__ >= 15009000
        #if defined(__TI_EABI__)
            .TI.ramfunc : {} LOAD = FLASHBCD,
                                 RUN = RAMLS0,
                                 LOAD_START(RamfuncsLoadStart),
                                 LOAD_SIZE(RamfuncsLoadSize),
                                 LOAD_END(RamfuncsLoadEnd),
                                 RUN_START(RamfuncsRunStart),
                                 RUN_SIZE(RamfuncsRunSize),
                                 RUN_END(RamfuncsRunEnd),
                                 PAGE = 0, ALIGN(8)
        #else
            .TI.ramfunc : {} LOAD = FLASHBCD,
                             RUN = RAMLS0,
                             LOAD_START(_RamfuncsLoadStart),
                             LOAD_SIZE(_RamfuncsLoadSize),
                             LOAD_END(_RamfuncsLoadEnd),
                             RUN_START(_RamfuncsRunStart),
                             RUN_SIZE(_RamfuncsRunSize),
                             RUN_END(_RamfuncsRunEnd),
                             PAGE = 0, ALIGN(8)
        #endif
    #else
   ramfuncs            : LOAD = FLASHBCD,
                         RUN = RAMLS0,
                         LOAD_START(_RamfuncsLoadStart),
                         LOAD_SIZE(_RamfuncsLoadSize),
                         LOAD_END(_RamfuncsLoadEnd),
                         RUN_START(_RamfuncsRunStart),
                         RUN_SIZE(_RamfuncsRunSize),
                         RUN_END(_RamfuncsRunEnd),
                         PAGE = 0, ALIGN(8)
    #endif

#endif

   /* The following section definitions are required when using the IPC API Drivers */
    GROUP : > CPU1TOCPU2RAM, PAGE = 1
    {
        PUTBUFFER
        PUTWRITEIDX
        GETREADIDX
    }

    GROUP : > CPU2TOCPU1RAM, PAGE = 1
    {
        GETBUFFER :    TYPE = DSECT
        GETWRITEIDX :  TYPE = DSECT
        PUTREADIDX :   TYPE = DSECT
    }

   /* The following section definition are for SDFM examples */
//   Filter1_RegsFile : > RAMGS1,	PAGE = 1, fill=0x1111
//   Filter2_RegsFile : > RAMGS2,	PAGE = 1, fill=0x2222
//   Filter3_RegsFile : > RAMGS3,	PAGE = 1, fill=0x3333
//   Filter4_RegsFile : > RAMGS4,	PAGE = 1, fill=0x4444
 //  Difference_RegsFile : >RAMGS5, 	PAGE = 1, fill=0x3333
}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

  • 0 in reply to Curtis Prehn
    TI__Guru* 91125 points

    Curtis,

    The linker generates a file with a .map extension.  Examine this file for any initialized sections that are loaded to RAM instead of Flash.  With CCS connected, initialized RAM can get populated where as without CCS connected, it will not get populated. 

    Regards

    Lori

  • 0 in reply to Lori Heustess
    TI__Guru* 91125 points

    Curtis,

    Please also see the FAQ located here: https://processors.wiki.ti.com/index.php/C2000_Flash_FAQ

    Specifically this item

    "2. Could you list the procedure involved in modifying an application from RAM based configuration to Flash based configuration in simple steps?"

    Best Regards
    Lori

  • 0 in reply to Lori Heustess
    Intellectual 350 points

    Lori,

    Below are some questions and comments I have for the FAQ procedure for modifying an application from RAM to Flash.  I am able to confirm parts a-e:

     f. All the sections mapped to Flash are aligned on a 128-bit boundary using ALIGN() directive in the Flash based linker command file.

    I've changed all of the ALIGN directives that were already present in the file to ALIGN(8).  Is this correct for the F28379D?  The FAQ says ALIGN(4) for C28x devices.


     g. memcpy() function is called in the application to copy the .TI.ramfunc content from Flash to RAM. memcopy() is called before executing any code that is assigned to .TI.ramfunc section.

    memcpy() is called in InitSysCrl(), which is the first line of my main function.
     
    h. For EABI type executable: All uninitialized sections mapped to RAM are defined as NOINIT sections (using the directive “type=NOINIT”) in the linker cmd file.

    The version of C2000Ware seems to use EABI.  I've added "TYPE = NOINIT" to .stack because it is an unitialized RAM data section.  I did not find any other unitialized RAM sections.

    As for the .map file, I'm not very familiar with this, but from what I can gather, the functions that need to be run in RAM that load the Flash to RAM are mapped to RAM.  The rest of the program is mapped to flash.  I'll attach the .map file, but I'll post the highlights below:

    SECTION ALLOCATION MAP

 output                                  attributes/
section   page    origin      length       input sections
--------  ----  ----------  ----------   ----------------
codestart 
*          0    00080000    00000002     
                  00080000    00000002     F2837xD_CodeStartBranch.obj (codestart)

.cinit     0    00083ab8    00000098     
                  00083ab8    0000000b     (.cinit..data.load) [load image, compression = lzss]
                  00083ac3    00000001     --HOLE-- [fill = 0]
                  00083ac4    00000006     (__TI_handler_table)
                  00083aca    00000004     (.cinit.AnalogSubsysRegsFile.load) [load image, compression = zero_init]
                  00083ace    00000004     (.cinit.ClkCfgRegsFile.load) [load image, compression = zero_init]
                  00083ad2    00000004     (.cinit.CpuSysRegsFile.load) [load image, compression = zero_init]
                  00083ad6    00000004     (.cinit.CpuTimer1RegsFile.load) [load image, compression = zero_init]
                  00083ada    00000004     (.cinit.CpuTimer2RegsFile.load) [load image, compression = zero_init]
                  00083ade    00000004     (.cinit.DcsmZ1RegsFile.load) [load image, compression = zero_init]
                  00083ae2    00000004     (.cinit.DcsmZ2RegsFile.load) [load image, compression = zero_init]
                  00083ae6    00000004     (.cinit.DevCfgRegsFile.load) [load image, compression = zero_init]
                  00083aea    00000004     (.cinit.Flash0CtrlRegsFile.load) [load image, compression = zero_init]
                  00083aee    00000004     (.cinit.Flash0EccRegsFile.load) [load image, compression = zero_init]
                  00083af2    00000004     (.cinit.FlashPumpSemaphoreRegsFile.load) [load image, compression = zero_init]
                  00083af6    00000004     (.cinit.GpioCtrlRegsFile.load) [load image, compression = zero_init]
                  00083afa    00000004     (.cinit.GpioDataRegsFile.load) [load image, compression = zero_init]
                  00083afe    00000004     (.cinit.InputXbarRegsFile.load) [load image, compression = zero_init]
                  00083b02    00000004     (.cinit.SHARERAMGS2.load) [load image, compression = zero_init]
                  00083b06    00000004     (.cinit.WdRegsFile.load) [load image, compression = zero_init]
                  00083b0a    00000002     --HOLE-- [fill = 0]
                  00083b0c    00000044     (__TI_cinit_table)

.stack     1    00000400    000003f8     UNINITIALIZED
                  00000400    000003f8     --HOLE--

.reset     0    003fffc0    00000000     DSECT

.init_array 
*          0    00082000    00000000     UNINITIALIZED

.data      1    0000a800    00000018     UNINITIALIZED
                  0000a800    00000008     spi_ex1_loopback.obj (.data)
                  0000a808    00000006     device.obj (.data)
                  0000a80e    00000006     rts2800_fpu32_eabi.lib : exit.c.obj (.data)
                  0000a814    00000002                            : _lock.c.obj (.data:_lock)
                  0000a816    00000002                            : _lock.c.obj (.data:_unlock)

.const     0    00090000    000003e0     
                  00090000    000000bc     driverlib_eabi.lib : gpio.obj (.const:.string)
                  000900bc    000000bb                        : sci.obj (.const:.string)
                  00090177    00000001     --HOLE-- [fill = 0]
                  00090178    000000ab     spi_ex1_loopback.obj (.const:.string)
                  00090223    00000001     --HOLE-- [fill = 0]
                  00090224    0000008e     adxl355.obj (.const:.string)
                  000902b2    00000060     driverlib_eabi.lib : sysctl.obj (.const:.string)
                  00090312    0000005d                        : spi.obj (.const:.string)
                  0009036f    00000001     --HOLE-- [fill = 0]
                  00090370    00000053     flash.obj (.const:.string)
                  000903c3    00000001     --HOLE-- [fill = 0]
                  000903c4    00000013     device.obj (.const:.string)
                  000903d7    00000001     --HOLE-- [fill = 0]
                  000903d8    00000008     F2837xD_SysCtrl.obj (.const)

.TI.ramfunc 
*          0    00086000    00000180     RUN ADDR = 00008000
                  00086000    00000145     flash.obj (.TI.ramfunc)
                  00086145    00000037     F2837xD_SysCtrl.obj (.TI.ramfunc)
                  0008617c    00000004     driverlib_eabi.lib : sysctl.obj (.TI.ramfunc)



.text      0    00082000    00001ab5     
                  00082000    000004c4     F2837xD_SysCtrl.obj (.text)
                  000824c4    00000375     adxl355.obj (.text)
                  00082839    00000369     spi_ex1_loopback.obj (.text)
                  00082ba2    0000024c     device.obj (.text)
                  00082dee    00000244     F2837xD_Gpio.obj (.text)
                  00083032    0000021f     driverlib_eabi.lib : sysctl.obj (.text:SysCtl_setClock)
                  00083251    00000088     rts2800_fpu32_eabi.lib : fs_div28.asm.obj (.text)
                  000832d9    00000068     driverlib_eabi.lib : sysctl.obj (.text:SysCtl_getDeviceParametric)
                  00083341    0000005e                        : sysctl.obj (.text:SysCtl_selectOscSource)
                  0008339f    0000005c                        : spi.obj (.text:SPI_setConfig)
                  000833fb    00000056     spi_ex1_loopback.obj (.text:retain)
                  00083451    00000052     driverlib_eabi.lib : gpio.obj (.text:GPIO_setPadConfig)
                  000834a3    00000051                        : sysctl.obj (.text:SysCtl_getClock)
                  000834f4    00000048     flash.obj (.text)
                  0008353c    00000046     driverlib_eabi.lib : sci.obj (.text:SCI_clearInterruptStatus)
                  00083582    00000041                        : sci.obj (.text:SCI_writeCharArray)
                  000835c3    0000003e                        : sci.obj (.text:SCI_setConfig)
                  00083601    0000003d                        : interrupt.obj (.text:Interrupt_initModule)
                  0008363e    0000003c                        : gpio.obj (.text:GPIO_setQualificationPeriod)
                  0008367a    00000038                        : gpio.obj (.text:GPIO_setMasterCore)
                  000836b2    00000038                        : gpio.obj (.text:GPIO_setQualificationMode)
                  000836ea    00000037                        : gpio.obj (.text:GPIO_setPinConfig)
                  00083721    00000034                        : gpio.obj (.text:GPIO_setInterruptPin)
                  00083755    00000034                        : interrupt.obj (.text:Interrupt_enable)
                  00083789    00000031                        : gpio.obj (.text:GPIO_setDirectionMode)
                  000837ba    00000031     rts2800_fpu32_eabi.lib : copy_decompress_lzss.c.obj (.text:decompress:lzss)
                  000837eb    00000030                            : ltoa.c.obj (.text)
                  0008381b    0000002b                            : autoinit.c.obj (.text:__TI_auto_init_nobinit_nopinit)
                  00083846    0000002a                            : fd_cmp28.asm.obj (.text)
                  00083870    0000002a                            : l_div28.asm.obj (.text)
                  0008389a    00000029                            : exit.c.obj (.text)
                  000838c3    00000022     driverlib_eabi.lib : sci.obj (.text:SCI_isFIFOEnabled)
                  000838e5    00000020                        : interrupt.obj (.text:Interrupt_initVectorTable)
                  00083905    0000001f                        : sci.obj (.text:SCI_isBaseValid)
                  00083924    0000001d     rts2800_fpu32_eabi.lib : memcpy.c.obj (.text)
                  00083941    0000001c                            : fs_tofdfpu32.asm.obj (.text)
                  0008395d    0000001b     driverlib_eabi.lib : sci.obj (.text:SCI_isSpaceAvailableNonFIFO)
                  00083978    0000001a                        : spi.obj (.text:SPI_isBaseValid)
                  00083992    0000001a                        : sysctl.obj (.text:SysCtl_getLowSpeedClock)
                  000839ac    00000019                        : sci.obj (.text:SCI_disableModule)
                  000839c5    00000019                        : sci.obj (.text:SCI_performSoftwareReset)
                  000839de    00000017                        : gpio.obj (.text:XBAR_setInputPin)
                  000839f5    00000017     rts2800_fpu32_eabi.lib : boot28.asm.obj (.text)
                  00083a0c    00000015     driverlib_eabi.lib : sci.obj (.text:SCI_getTxFIFOStatus)
                  00083a21    00000014                        : sci.obj (.text:SCI_enableModule)
                  00083a35    0000000e                        : gpio.obj (.text:GPIO_isPinValid)
                  00083a43    0000000e                        : interrupt.obj (.text:Interrupt_defaultHandler)
                  00083a51    0000000d                        : interrupt.obj (.text:Interrupt_disableMaster)
                  00083a5e    0000000d                        : interrupt.obj (.text:Interrupt_enableMaster)
                  00083a6b    0000000c     rts2800_fpu32_eabi.lib : args_main.c.obj (.text)
                  00083a77    0000000c                            : memset.c.obj (.text)
                  00083a83    0000000b     driverlib_eabi.lib : sysctl.obj (.text:SysCtl_isMCDClockFailureDetected)
                  00083a8e    00000009                        : sysctl.obj (.text:SysCtl_serviceWatchdog)
                  00083a97    00000009     rts2800_fpu32_eabi.lib : _lock.c.obj (.text)
                  00083aa0    00000008                            : copy_decompress_none.c.obj (.text:decompress:none)
                  00083aa8    00000006                            : copy_zero_init.c.obj (.text:decompress:ZI)
                  00083aae    00000002     driverlib_eabi.lib : interrupt.obj (.text:Interrupt_illegalOperationHandler)
                  00083ab0    00000002                        : interrupt.obj (.text:Interrupt_nmiHandler)
                  00083ab2    00000002     rts2800_fpu32_eabi.lib : pre_init.c.obj (.text)
                  00083ab4    00000001                            : startup.c.obj (.text)

SHARERAMGS2 
*          1    0000e000    00002ee0     UNINITIALIZED
                  0000e000    00002ee0     spi_ex1_loopback.obj (SHARERAMGS2)

MODULE SUMMARY

       Module                           code   ro data   rw data
       ------                           ----   -------   -------
    .\
       spi_ex1_loopback.obj             959    171       12008  
       F2837xD_GlobalVariableDefs.obj   0      0         1577   
       F2837xD_SysCtrl.obj              1330   8         0      
       adxl355.obj                      885    142       0      
       flash.obj                        722    83        0      
       F2837xD_Gpio.obj                 580    0         0      
    +--+--------------------------------+------+---------+---------+
       Total:                           4476   404       13585  
                                                                
    .\device\
       device.obj                       588    19        6      
       F2837xD_CodeStartBranch.obj      2      0         0      
    +--+--------------------------------+------+---------+---------+
       Total:                           590    19        6      
                                                                
    C:\ti\C2000Ware_3_02_00_00_Software\driverlib\f2837xd\driverlib\ccs\Debug\driverlib_eabi.lib
       sysctl.obj                       876    96        0      
       gpio.obj                         447    188       0      
       sci.obj                          380    187       0      
       spi.obj                          118    93        0      
       interrupt.obj                    189    0         0      
    +--+--------------------------------+------+---------+---------+
       Total:                           2010   564       0      
                                                                
    C:\ti\ccs901\ccs\tools\compiler\ti-cgt-c2000_18.12.1.LTS\lib\rts2800_fpu32_eabi.lib
       fs_div28.asm.obj                 136    0         0      
       copy_decompress_lzss.c.obj       49     0         0      
       ltoa.c.obj                       48     0         0      
       exit.c.obj                       41     0         6      
       autoinit.c.obj                   43     0         0      
       fd_cmp28.asm.obj                 42     0         0      
       l_div28.asm.obj                  42     0         0      
       memcpy.c.obj                     29     0         0      
       fs_tofdfpu32.asm.obj             28     0         0      
       boot28.asm.obj                   23     0         0      
       _lock.c.obj                      9      0         4      
       args_main.c.obj                  12     0         0      
       memset.c.obj                     12     0         0      
       copy_decompress_none.c.obj       8      0         0      
       copy_zero_init.c.obj             6      0         0      
       pre_init.c.obj                   2      0         0      
       startup.c.obj                    1      0         0      
    +--+--------------------------------+------+---------+---------+
       Total:                           531    0         10     
                                                                
       Stack:                           0      0         1016   
       Linker Generated:                0      149       0      
    +--+--------------------------------+------+---------+---------+
       Grand Total:                     7607   1136      14617

    progam_map_file_contents.txt
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    ******************************************************************************
    TMS320C2000 Linker PC v18.12.1
    ******************************************************************************
    >> Linked Thu Jul 2 10:45:24 2020
    OUTPUT FILE NAME: <spi_ex1_loopback.out>
    ENTRY POINT SYMBOL: "code_start" address: 00080000
    MEMORY CONFIGURATION
    name origin length used unused attr fill
    ---------------------- -------- --------- -------- -------- ---- --------
    PAGE 0:
    RAMM0 00000123 000002dd 00000000 000002dd RWIX
    RAMLS0 00008000 00000800 00000180 00000680 RWIX
    RAMLS1 00008800 00000800 00000000 00000800 RWIX
    RAMLS2 00009000 00000800 00000000 00000800 RWIX
    RAMLS3 00009800 00000800 00000000 00000800 RWIX
    RAMLS4 0000a000 00000800 00000000 00000800 RWIX
    RAMD0 0000b000 00000800 00000000 00000800 RWIX
    RAMGS14 0001a000 00001000 00000000 00001000 RWIX
    RAMGS15 0001b000 00000ff8 00000000 00000ff8 RWIX
    BEGIN 00080000 00000002 00000002 00000000 RWIX
    FLASHA 00080002 00001ffe 00000000 00001ffe RWIX
    FLASHB 00082000 00002000 00001b4d 000004b3 RWIX
    FLASHC 00084000 00002000 00000000 00002000 RWIX
    FLASHD 00086000 00002000 00000180 00001e80 RWIX
    FLASHE 00088000 00008000 00000000 00008000 RWIX
    FLASHF 00090000 00008000 000003e0 00007c20 RWIX
    FLASHG 00098000 00008000 00000000 00008000 RWIX
    FLASHH 000a0000 00008000 00000000 00008000 RWIX
    FLASHI 000a8000 00008000 00000000 00008000 RWIX
    FLASHJ 000b0000 00008000 00000000 00008000 RWIX
    FLASHK 000b8000 00002000 00000000 00002000 RWIX
    FLASHL 000ba000 00002000 00000000 00002000 RWIX
    FLASHM 000bc000 00002000 00000000 00002000 RWIX
    FLASHN 000be000 00001ff0 00000000 00001ff0 RWIX
    RESET 003fffc0 00000002 00000000 00000002 RWIX
    PAGE 1:
    BOOT_RSVD 00000002 00000121 00000000 00000121 RWIX
    RAMM1 00000400 000003f8 000003f8 00000000 RWIX
    ADCA_RESULT 00000b00 00000020 00000000 00000020 RWIX
    ADCB_RESULT 00000b20 00000020 00000000 00000020 RWIX
    ADCC_RESULT 00000b40 00000020 00000000 00000020 RWIX
    ADCD_RESULT 00000b60 00000020 00000000 00000020 RWIX
    CPU_TIMER0 00000c00 00000008 00000000 00000008 RWIX
    CPU_TIMER1 00000c08 00000008 00000008 00000000 RWIX
    CPU_TIMER2 00000c10 00000008 00000008 00000000 RWIX
    PIE_CTRL 00000ce0 00000020 00000000 00000020 RWIX
    PIE_VECT 00000d00 00000200 00000000 00000200 RWIX
    DMA 00001000 00000200 00000000 00000200 RWIX
    CLA1 00001400 00000040 00000000 00000040 RWIX
    EPWM1 00004000 00000100 00000000 00000100 RWIX
    EPWM2 00004100 00000100 00000000 00000100 RWIX
    EPWM3 00004200 00000100 00000000 00000100 RWIX
    EPWM4 00004300 00000100 00000000 00000100 RWIX
    EPWM5 00004400 00000100 00000000 00000100 RWIX
    EPWM6 00004500 00000100 00000000 00000100 RWIX
    EPWM7 00004600 00000100 00000000 00000100 RWIX
    EPWM8 00004700 00000100 00000000 00000100 RWIX
    EPWM9 00004800 00000100 00000000 00000100 RWIX
    EPWM10 00004900 00000100 00000000 00000100 RWIX
    EPWM11 00004a00 00000100 00000000 00000100 RWIX
    EPWM12 00004b00 00000100 00000000 00000100 RWIX
    ECAP1 00005000 00000020 00000000 00000020 RWIX
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

  • 0 in reply to Curtis Prehn
    TI__Guru* 87105 points

    Curtis,

    Thank you for sharing the map file with us.

    I will look in to it and get back to you in a day or two.

    Thanks and regards,
    Vamsi

  • 0 in reply to Vamsi Gudivada
    TI__Guru* 87105 points

    Curtis,

    Thank you for the info.

    f. ALIGN(8) is good (and is suggested).  It includes ALIGN(4).  

    h. Other uninitialized sections include .bss, .data and .sysmem.  You have .data.  It may not be a big thing.

    You already confirmed that the .TI.ramfunc is mapped to Flash for load and RAM for run. And memcpy() is executed.

    Hence, I would suggest you to check below:

    1. Can you check whether the Boot mode pins are configured for Flash boot?

    2. Can you check if there is a toggle on XRSn? If there is a toggle on XRSn, it means a reset is occurring.  It can be that watchdog is triggering the reset during c_init routine.  Can you try disabling watchdog in the codestartbranch.asm?

    Thanks and regards,
    Vamsi

  • 0 in reply to Vamsi Gudivada
    Intellectual 350 points

    Vamsi,

    I added TYPE = NOINIT to the sections you mentioned and modified the line in the CodeStartBranch.asm file to as follows:

    WD_DISABLE  .set  1    ;set to 1 to disable WD, else set to 0

    It seems to work now!  Thank you!

    Curtis

  • 0 in reply to Curtis Prehn
    TI__Guru* 87105 points

    Curtis,

    Glad it helped.

    You might want to try each of them separately to understand which one helped.

    Thanks and regards,
    Vamsi