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TMS320F280049C: CLA Background Task Context Overhead

Eric Best
Expert 7205 points
Part Number: TMS320F280049C

Would like to understand lower level performance impact of enabling the CLA background task, i.e. the context overhead switching to a foreground task.  This detail can be summarized by the elapsed time from the edge of a CLA trigger source to the first instruction of a foreground task, with and without the background task enabled.  Section 8.3.4 of the TRM discusses the high level, but no cycle count impact is indicated.  The CLA Software Development Guide also does not mention this detail.  Suggest as an addition to these docs.

Thanks,

Eric 

  • 0
    TI__Guru* 91235 points

    Hi Eric - I am looking into this and need to check with our design team.  I will report back by end of Monday, if not earlier. 

    -Lori

  • 0 in reply to Lori Heustess
    TI__Guru* 91235 points

    Eric,

    Background task is running and a trigger is asserted: it takes 9 clock edges to bring the MCLA instruction of newly triggered task to D2 phase i.e MPC starts executing the new foreground task. 

    • Cycle 1 – IACK or task trigger gets asserted (MRUN is 0x80 i.e task 8 / background task is running)
    • Cycle 2 – Task trigger gets sampled and process to exit background task starts
    • Cycle 3 - MSTSBGRND.RUN is cleared, MPC is copied to MVECTBGRNDACTIVE, MSTOP is asserted
    • Cycle 4 – MSTOP is sampled in the D2 phase of pipeline
    • Cycle 5 – Arbitration of pending tasks is done and highest pending task is given priority (MRUN changes to the new task)
    • Cycle 6,7,8,9 – F1,F2, D1 and D2 phase of pipeline before MPC gets updated with first instruction of new task 

    Note: if MBCNDD, MCCNDD, or MRCNDD are in D2 when a new task is triggered, it will take 3 more cycles to complete the uninterruptible instruction as mentioned in the TRM. 

    Compared to starting a normal task, there is difference of one clock cycle to force the MSTOP in D2 phase of background task  before it exits as compared to normal task starting.  That is, for a normal task there are 8 clock edges to bring the MCLA instruction of new task to D2 phase i.e MPC starts executing the newly triggered task.