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TMS320F280049: different ADC result compared to F28075

Part Number: TMS320F280049

Hi,

my customer is using F28075 and F280049 to measure the same voltage signal VBUSP as shown below, M_VBUSP is connected to F28075 ADC A3, S_VBUSP is connected to F280049 ADC C5.

The signal to be sampled is the blue line below, we can see there is 2Hz ripple.

With F28075's ADC, the ADC result is logged and the digitized result is the red line, which also has 2Hz ripple:

With F2800049's ADC, the ADC result is logged and the digitized result is the green line, which doesn't have 2Hz ripple:

The absolute value is similar, the problem is that with F280049's ADC, the 2Hz ripple is somehow filtered out in the digitized ADC result.

The input filter RC is the same for F280049 and F28075. And the external reference of ADC is shared between F28075 and F280049. 

Both AD are converted in 18kHz, which is the same as the PWM frequency.

We have tried to increase the AD S+H window duration from 10 SYSCLK to 100SYSCLK, which doesn't help.

We have tried to adjust the sample sequence of F280049, for example, C1-C2-C3-C4-C5 to C1-C5-C2-C3-C4, and it doesn't help.

We've no idea why we can't see the 2Hz ripple in the digitized ADC result.

  • Hi Howard,

    Would you also please check/confirm the following parameters as well?

    - SYSCLK on F280049 and F28075

    - ADCPRECALE used on F280049 and F28075

    - Are the same number of SOCs being used on the F280049 and F28075?

    - Are the functions and operations when reading the SOC results from  the AdcResultsRegs same on both F280049 and F28075?

    Thanks and regards,

    Joseph 

  • SYSCLK: F280049 50M, F28075 60M

    ADCCLK: F280049 25M, F28075 30M, all are SYSCLK/2.

    - Are the same number of SOCs being used on the F280049 and F28075?

    No, they are different, but we are sure that all the SOCs won't take longer than a PWM cycle. We are not able to make the SOC exactly the same to test, since they are physically connected to different signals and are used for the control loop.

    - Are the functions and operations when reading the SOC results from  the AdcResultsRegs same on both F280049 and F28075?

    Yes.

  • Hi Howard,

    Thanks for checking the ADC settings.  There does not seem to be an issue with clocking.  One quick thing to try on the F280049 side is to decrease the ACQPS, instead of increasing it.  Could be that SH settling is too long that the signal is averaged.  What is the sequence of conversions on the SOCs and what channels and signals are they associated with?  For a quick debug, is it possible to turn off the other SOCs and just convert the one associated with S_VBUSP on F280049 ch C5 while M_VBUSP is disconnected from the F28075 ADC input A3 and see if the 2kHz peaks are captured?  Just trying to see if the other channels that are converting are affecting the results on C5.

    Thanks,

    Joseph