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TMS320F280049: LIN input clock

Part Number: TMS320F280049
Other Parts Discussed in Thread: TMS570LC4357

Hi Expert,

From the TRM, the LIN module input clock is 50MHz, which is one-half the CPU clock (SYSCLKOUT). any register to set this frequency division? or it is a fixed value from one-half the CPU clock (SYSCLKOUT)? I did not find where 50MHz derive from.


  • Chapter 27 Local Interconnect Network (LIN) of the TMS320F28004x Real-Time Microcontrollers Technical Reference Manual (Rev. D) gives the input clock to the LIN module as the "peripheral VCLK". However a search of the TRM and TMS320F28004x Microcontrollers datasheet (Rev. E) doesn't define what VCLK is.

    I think mention of the "peripheral VCLK" in the TMS320F280049 TRM has been copied from a different device which uses the same LIN module, without being updated to give the actual LIN module clock source in the TMS320F280049.

    E.g. TMS570LC43x 16/32 RISC Flash Microcontroller Technical Reference Manual (Rev. A) has a description of Serial Communication Interface (SCI)/ Local Interconnect Network (LIN) Module which looks similar to the LIN module in the TMS320F280049 TRM. In the TMS570LC4357 VCLK is defined a peripheral clock.

    I think the TMS320F280049 documentation should be clarified to give the input clock to the LIN module.

  • Hi Quote,

    Thanks for your reply, input clock to the LIN is 100MHz or is 50MHz? actually my customer do the configuration for baud rate according to 50MHz as the below table showed,  it will fail to communicate, but if they use 100MHz for calculation, then it will work.

    For example, if they set P value as 53, M value as 4, then selected 57600 as bit rate according to the below table, then if the PC GUI set baud rate as 57600, then it will fail to communicate, but if PC GUI set  baud rate as 115200bps, then it will communicate successfully.

  • Hi Strong, Chester, 

    I have reviewed the exchange regarding VCLK and the confusion regarding whether it should be configured as 100MHz or 50MHz.  The TRM is not clear on how the VCLK is derived. 

    I have looped in the domain experts and plan to consult with them upon their return after the holidays.  I will get back to you at then.  But for the moment, Strong, it looks like you have a functional setting but looking for an explanation about how it works right?

    Thanks,
    Krishna 

  • Krishna,

    Thanks for your support, yes, the customer have get LIN work well, but the configuration does not match with what TRM talking about, require an explanation what is the reason.

  • There is the following in the System Control and Interrupts chapter of the TMS320F28004x Real-Time Microcontrollers Technical Reference Manual (Rev. D) which shows that the clock source to the LIN module is PERx.SYSCLK:

    In the Local Interconnect Network (LIN) chapter of TMS320F28004x TRM should mention of VCLK should be changed to PERx.SYSCLK?

  • PERx.SYSCLK is 100MHz, but LIN module input clock is 50MHz as the TRM mention.it seem it is not clearly how 50MHz clock come from.

  • Hi Strong - Table in TRM chapter needs to be corrected, VCLK is same as PERx.SYSCLK, there is no divider in the path. Table should indicate LIN input clock = 100MHz. We will file a ticket to get this updated for next release.

    Best Regards,

    Nirav