TMS320F280049C: Flagging/clearing of SCI errors in FIFO mode

Hong,

1. Your table looks correct.

2. No, if RXERRINTENA is enabled the interrupt will automatically be triggered.  Note for BRKDT to generate an interrupt, RXBKINTENA must be enabled.

3. Yes, these bits are independent of the FIFO being enabled.  The RXERROR flag is set by the logical OR of BRKDT, FE, OE, and PE.  Note that RXERROR would not be set unnecessarily, but if it did detect an error it would indicate that.

4. These bits are only applicable when the FIFO is enabled.  Yes, both resets will clear these flags.

I hope this helps. If this answers your question, please click the green "Verified Answer" button. Thanks.

- Ken

Hi Ken,

Thanks for your reply, though I'm not clear on 2 & 4:

2. To detect BRKDT errors, I was trying to use RXERRINTENA to enable interrupts as per footnote (2) of Table 23-4 in the TRM. The issue as you noted in your reply to Q3 is that FE, PE and OE (even though not relevant when FIFO is enabled) will also set the same RXERR flag and trigger the interrupt.

The difficulty I'm facing is that upon a break error, FE is set first and BRKDT is only set 10 bit times after that. Is it correct to say that if I clear FE via a SCI software reset before BRKDT is set (i.e. before 10 bit times are up), BRKDT will never be set? Would like to know from TI what the expected behavior should be in order to write my error handling code.

4. I've been unable to clear SCIFFFE/SCIFFPE flags with either of those two resets. Is there any way to do so?

Regards,

Hong En

Hong,

I am in the process of investigating your questions and I will reply soon.

- Ken

Thanks Ken, much appreciated.

Thanks Ken, appreciate the help.

Regards,

Hong En