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TMS570LS1224: Issue of SPI communicaton between TMS570LS12x launchpad and TMDS570LS31HDK

Part Number: TMS570LS1224
Other Parts Discussed in Thread: TMDS570LS31HDK, HALCOGEN

Hi,

This issue is related to several tests about SPI communication.

The first successful test is based on TMS570LS12x. The test involved with SPI1 and SPI3 based on code of "example_spi_Master_Slave.c". The link of URL is https://e2e.ti.com/support/microcontrollers/hercules/f/312/t/902181.

The second failed test is based on TMS570LS12x and AD7705 on my board. The link of URL is https://e2e.ti.com/support/microcontrollers/hercules/f/312/t/907453

In order to find the cause for the second test, I make the third test between SPI1 (as master in poll mode like the first test) in TMS570LS12x launchpad and SPI2 (as slave in interrupt mode like the first test) in TMDS570LS31HDK. According to observate receive buffer of master, it is founded that every data is 65535 shown as below.

The config of SPI1 and SPI2 are shown as below.

Here is test code for SPI1 running on TMS570LS12x.

/* USER CODE BEGIN (0) */
/* USER CODE END */

/* Include Files */

#include "sys_common.h"

/* USER CODE BEGIN (1) */
#include "spi.h"
#include "gio.h"
/* USER CODE END */

/** @fn void main(void)
*   @brief Application main function
*   @note This function is empty by default.
*
*   This function is called after startup.
*   The user can use this function to implement the application.
*/

/* USER CODE BEGIN (2) */
#define DELAY_VALUE 1000000
uint16 TX_Data_Master[16] = { 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10 };
uint16 TX_Data_Slave[16]  = { 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F, 0x20 };
uint16 RX_Data_Master[16] = { 0 };
uint16 RX_Data_Slave[16]  = { 0 };
uint16 cmd=0;
/* USER CODE END */

int main(void)
{
/* USER CODE BEGIN (3) */
    int i;
    spiDAT1_t dataconfig1_t;

    dataconfig1_t.CS_HOLD = FALSE;
    dataconfig1_t.WDEL    = TRUE;
    dataconfig1_t.DFSEL   = SPI_FMT_0;
    dataconfig1_t.CSNR    = 0x01;//0xFE;

    gioInit();

    /* Initialize SPI Module Based on GUI configuration
     * SPI1 - Master ( SIMO, SOMI, CLK, CS0 ) @TMS570LS12x poll mode
     * SPI2 - Slave  ( SIMO, SOMI, CLK, CS0 ) @TMDS570LS31HDK interrupt mode
     * this is master of SPI1
     * */
    spiInit();

    while(1)
    {

        /* Initiate SPI1 Transmit and Receive through Polling Mode*/
        spiTransmitAndReceiveData(spiREG1, &dataconfig1_t, 16, TX_Data_Master, RX_Data_Master);

        while(SPI_COMPLETED==SpiRxStatus(spiREG1));

        if(RX_Data_Master[15]==0x20)
        {
            RX_Data_Master[15]=0xff;

            gioToggleBit(gioPORTB, 1);
        }
        else
        {
            gioSetBit(gioPORTB, 2, 1);
//            while(1);
        }
    }

        for(i=0;i<DELAY_VALUE;i++);
/* USER CODE END */

    return 0;
}

Here is test code for SPI2 running on TMDS570LS31HDK.

/* USER CODE BEGIN (0) */
/* USER CODE END */

/* Include Files */

#include "sys_common.h"

/* USER CODE BEGIN (1) */
#include "gio.h"
#include "het.h"
#include "spi.h"
#include "rti.h"
/* USER CODE END */

/** @fn void main(void)
*   @brief Application main function
*   @note This function is empty by default.
*
*   This function is called after startup.
*   The user can use this function to implement the application.
*/

/* USER CODE BEGIN (2) */
#define DELAY_VALUE 1000000
uint16 TX_Data_Master[16] = { 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10 };
uint16 TX_Data_Slave[16]  = { 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F, 0x20 };
uint16 RX_Data_Master[16] = { 0 };
uint16 RX_Data_Slave[16]  = { 0 };
uint16 cmd=0;
/* USER CODE END */

int main(void)
{
/* USER CODE BEGIN (3) */
    int i;
    spiDAT1_t dataconfig1_t;

    dataconfig1_t.CS_HOLD = FALSE;
    dataconfig1_t.WDEL    = TRUE;
    dataconfig1_t.DFSEL   = SPI_FMT_0;
    dataconfig1_t.CSNR    = 0x01;//0xFE;

    gioInit();
    hetInit();

    /* Enable CPU Interrupt through CPSR */
    _enable_IRQ();

    /* Initialize RTI */
    rtiInit();
    /* Enable RTI compare 0 notification */
    rtiEnableNotification(rtiNOTIFICATION_COMPARE0);
    /* Start counter */
    rtiStartCounter(rtiCOUNTER_BLOCK0);

    /* This is slave spi2. */
    spiInit();

    while(1)
    {
        /* Initiate SPI2 Transmit and Receive through Interrupt Mode */
        spiSendAndGetData(spiREG2, &dataconfig1_t, 16, TX_Data_Slave, RX_Data_Slave);

        while(cmd==1);
        cmd=0;
    }
/* USER CODE END */

    return 0;
}


/* USER CODE BEGIN (4) */
void spiEndNotification(spiBASE_t *spi)
{
    if(SPI_COMPLETED==SpiRxStatus(spi))
    {
        if(RX_Data_Slave[15]==0X10)
        {
            RX_Data_Slave[15]=0;
            gioToggleBit(hetPORT1, 27);
            cmd==1;
            return;
        }
       else
       {
           gioSetBit(hetPORT1, 17, 1);
           return;
       }
    }else if(SPI_COMPLETED==SpiTxStatus(spi))
    {
        gioToggleBit(hetPORT1, 5);
        return;
    }
    else
    {
        gioSetBit(hetPORT1, 25, 1);
        return;
    }
}

void rtiNotification(uint32 notification)
{
    gioToggleBit(hetPORT1, 29);
}
/* USER CODE END */

The photo of connecting TMS570LS12x launchpad and TMDS570LS31HDK is shown as below.

Please help me to find out my mistake or something I missed.

Best regards

Datïan

  • Hi Datian,

    If the chip select default pattern (CDEF) in your configuration is 0xFF, the CSNR field in SPIDAT1 should be 0xFE for CS0. If the CDEF is 0x00, the CSNR field is 0x1 for CS0.

    The slave is not able to transfer data with the clock from master. Please make sure spiSendAndGetData() is slave side is executed first. 

    If you start master TX first, the slave may detect the CS de-assertion before its charlen overflows, the SPISOMI will be placed in high-impedance mode. 

  • Hi QJ,

    Many thanks for your very clear explanation. I'll try it.

    Kind regards

    Datïan

  • Sorry for my typo:

    The slave is not able to transfer data without the clock from master. Please make sure spiSendAndGetData() in slave side is executed first. 

  • Hi QJ,

    I did not find the CSDEF for Spi2 (slave). 

    For Spi 1(master), I saw the CSDEF is 0xff for the MibSpi1 in HalCoGen shown as below. But I think what I use is Spi but not MibSpi.

    So I changed the CSNR from 0x01 to 0xFE shown as below. Do you think my understanding is correct ?

    I make sure the sequence of power up is slave first. In this situation, the receiving data are changed. But they are not as expectation of 

    0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F, 0x20 }.

    May I ask you to check what I did for helping me find the cause ? And do you think I need to probe any pins ?

    Warm regards

    Datïan

  • Hi Datian,

    The CSDEF=0xFF in your screenshot is for MibSPI1. Please check the value of SPIDEF registers of SPI1 (master) and SPI2 (slave).

    How do you connect SPI2 to SPI1? The correct signals mapping should like this:

    SPI1_nCS0  --- SPI2_nCS0

    SPI1_CLK  ----  SPI2_CLK

    SPI1_SIMO ---- SPI2_SIMO                 

    SPI1_SOMI --- SPI2_SOMI

     

    Don't connect SIMO to SOMI