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TMS570LS1224: Issue of communication between 1224pge and AD7705 over SPI1

Part Number: TMS570LS1224
Other Parts Discussed in Thread: HALCOGEN

Hi,

I'm testing communication between TMS570LS1244 on Lauchpad TMS570LS12x and AD7705 on my board over SPI1. It doesn't work. Let's call it test 2.

Before test 2, I have tested SPI1 and SPI3 commnunication on Lauchpad. It worked. Let's call it test 1.

I probed the clk pin of SPI1 (as master) for test 1 and test 2, shown as below. It looks like clk in test 2 is not correct.

The connection of test 2 is shown as below.

Here are the photos of test 1 and test 2.

Here is the code for test 2.

int main(void)
{
/* USER CODE BEGIN (3) */
    uint16 TX_Data_Master[4] = { 0x20, 0x0C, 0x10, 0x40};
    uint16 TX_Request_Data = 0x38;
    uint16 RX_Data_Master = 0;

    spiDAT1_t dataconfig1_t;

    /* the only pin that is programmed here from the 68HC11 is the /CS and this is why the PC2 bit of PORTC is
    made as
    an output */
    char a=0;
    int i;
    uint32 ready=0;
//    DDRC = 0x04; /* PC2 is an output the rest of the port bits are inputs */
//    PORTC | = 0x04; /* make the /CS line high */

    dataconfig1_t.CS_HOLD = FALSE;
    dataconfig1_t.WDEL    = TRUE;
    dataconfig1_t.DFSEL   = SPI_FMT_0;
    dataconfig1_t.CSNR    = 0xFE;

    gioInit();
    spiInit();
    hetInit();

    //Writetoreg(0x20); /* Active Channel is Ain1(+)/Ain1(-), next operation as write to the clock register */
    spiTransmitData(spiREG1, &dataconfig1_t, 1, &TX_Data_Master[0]);
    //Writetoreg(0x0C); /* master clock enabled, 4.9512MHz Clock, set output rate to 50Hz*/
    spiTransmitData(spiREG1, &dataconfig1_t, 1, &TX_Data_Master[1]);
    //Writetoreg(0x10); /* Active Channel is Ain1(+)/Ain1(-), next operation as write to the setup register */
    spiTransmitData(spiREG1, &dataconfig1_t, 1, &TX_Data_Master[2]);
    //Writetoreg(0x40); /* gain = 1, bipolar mode, buffer off, clear FSYNC and perform a Self Calibration*/
    spiTransmitData(spiREG1, &dataconfig1_t, 1, &TX_Data_Master[3]);

    //    while(PORTC & 0x10); /* wait for /DRDY to go low */
    //for(a=0;a<NUM_SAMPLES;a++)
    while(1)
    {
    //    connectRTD(a%4);

    //Writetoreg(0x38); /*set the next operation for 16 bit read from the data register */
        spiTransmitData(spiREG1, &dataconfig1_t, 1, &TX_Request_Data);

        while(0==ready)
        {
            ready=gioGetBit(mibspiPORT3, PIN_CS3);
        }

        ready=0;

    //Read(NUM_SAMPLES,2);
        spiReceiveData(spiREG1, &dataconfig1_t, 1, &RX_Data_Master);

    //    disconnectRTD(a%4);

        if(RX_Data_Master==65535)
            RX_Data_Master=0;

        for(i=0;i<DELAY_VALUE;i++);
        gioToggleBit(gioPORTB, 1);

        a++;
    }

/* USER CODE END */

    return 0;
}

Please help me to find out my mistake or something I missed.

Best Regards

Datïan

  • Hello Datian,

    1. Make sure MibSPI3_CS3 and MibSPI3_CS2 are configured as GIO pins rather than SPI functional pins

    2. Use spiTransmitAndReceiveData(...) instead of calling 2 functions: spiTransmitData(), and spiReceiveData().

       

  • For SPI communication, only SPI master generates the clock signal. If the slave needs to send data back to master, the master needs to provide a pre-arranged number of clock cycles. 

    1. Check DRDY if it is valid

    2. If it is low, master provide clock, and read the data

  • Hello QJ,

    Many thanks for your help.

    For point 1, I think CS3 and CS2 are configured as GIO, shown as below.

    For point 2, I think I need to transmit 4 bytes to set register of AD7705, and 2 bytes from AD7705. I don't know how to deal with different length for the third  argument of spiTransmitAndReceiveData(...). So I used spiTransmitData(), and spiReceiveData(). Would you like to explain more about this suggestion ?

    Kind regards

    Datïan

  • Thank you.

    I think I use CS3 of mibspiPORT3 to detect DRDY. And I don't know how to check DRDY during call function of spiTransmitAndReceiveData(...).

    The code of checking DRDY is like that.

            while(0==ready)
            {
                ready=gioGetBit(mibspiPORT3, PIN_CS3);
            }
    
            ready=0;

    Warm regards

    Datïan

  • Hello QJ,

    May I ask to check the signal of clock I probed in the photos ? Do they look good accoding to the setting of VCLK in HalCoGen shown as below ?

    Best regards

    Datïan

  • Hello QJ,

    I add checking DRDY before calling  spiTransmitAndReceiveData(...) every time.

    Thing goes to differently. In the first time of checking, DRDY turns to low. Then DRDY keeps high.

    Here is the snapshot of running program. And I know AD7705 expects four bytes by four times for registers, such as

    1) 0x20 for "Active Channel is Ain1(+)/Ain1(-), next operation as write to the clock register",

    2) 0x0C for "master clock enabled, 4.9512MHz Clock, set output rate to 50Hz",

    3) 0x10 for "Active Channel is Ain1(+)/Ain1(-), next operation as write to the setup register",

    4) 0x40 for "gain = 1, bipolar mode, buffer off, clear FSYNC and perform a Self Calibration".

    But I don't know how to write a byte but a uint by spiTransmitAndReceiveData(...).

    Please help me to do better.

    Kind regards

    Datïan

  • hello Datïan

    could you please share with me your testing code 

    between spi1 and spi3

    i wrote my code but it's not working fine

  • hello B.M, 

    Sure. Here you are. I'm very glad to know your progress or issues. Good luck.

    /* USER CODE BEGIN (0) */
    /* USER CODE END */
    
    /* Include Files */
    
    #include "sys_common.h"
    
    /* USER CODE BEGIN (1) */
    #include "spi.h"
    #include "gio.h"
    /* USER CODE END */
    
    /** @fn void main(void)
    *   @brief Application main function
    *   @note This function is empty by default.
    *
    *   This function is called after startup.
    *   The user can use this function to implement the application.
    */
    
    /* USER CODE BEGIN (2) */
    #define DELAY_VALUE 1000000
    uint16 TX_Data_Master[16] = { 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10 };
    uint16 TX_Data_Slave[16]  = { 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F, 0x20 };
    uint16 RX_Data_Master[16] = { 0 };
    uint16 RX_Data_Slave[16]  = { 0 };
    uint16 cmd=0;
    /* USER CODE END */
    
    int main(void)
    {
    /* USER CODE BEGIN (3) */
        int i;
        spiDAT1_t dataconfig1_t;
    
        dataconfig1_t.CS_HOLD = FALSE;
        dataconfig1_t.WDEL    = TRUE;
        dataconfig1_t.DFSEL   = SPI_FMT_0;
        dataconfig1_t.CSNR    = 0xFE;
    
        gioInit();
    
        /* Enable CPU Interrupt through CPSR */
        _enable_IRQ();
    
        /* Initialize SPI Module Based on GUI configuration
         * SPI1 - Master ( SIMO, SOMI, CLK, CS0 )
         * SPI3 - Slave  ( SIMO, SOMI, CLK, CS0 )
         * */
        spiInit();
    
    //    spiEnableNotification(spiREG3, 0x0100U);//0x0100 R buffer is full; 0x0200 T buffer is empty
    
        while(1)
        {
            /* Initiate SPI3 Transmit and Receive through Interrupt Mode */
            spiSendAndGetData(spiREG3, &dataconfig1_t, 16, TX_Data_Slave, RX_Data_Slave);
    
            /* Initiate SPI1 Transmit and Receive through Polling Mode*/
            spiTransmitAndReceiveData(spiREG1, &dataconfig1_t, 16, TX_Data_Master, RX_Data_Master);
    
            while(SPI_COMPLETED==SpiRxStatus(spiREG1));
    
            if(RX_Data_Master[15]==0x20)
            {
                RX_Data_Master[15]=0;
            }
            else
            {
                while(1);
            }
    
            for(i=0;i<DELAY_VALUE;i++);
        }
    /* USER CODE END */
    
        return 0;
    }
    
    
    /* USER CODE BEGIN (4) */
    /** @fn void spiEndNotification(spiBASE_t *spi)
    *   @brief Interrupt callback for End of TX or RX data length.
    *   @param[in] spi   - Spi module base address
    *
    * This is a callback that is provided by the application and is called upon
    * an interrupt at the End of TX or RX data length.
    */
    void spiEndNotification(spiBASE_t *spi)
    {
        if(SPI_COMPLETED==SpiRxStatus(spi))
        {
            if(RX_Data_Slave[15]==0X10)
            {
                RX_Data_Slave[15]=0;
                gioToggleBit(gioPORTB, 1);
                return;
            }
           else
           {
               gioSetBit(gioPORTB, 1, 0);
               return;
           }
        }else if(SPI_COMPLETED==SpiTxStatus(spi))
        {
            gioToggleBit(gioPORTB, 2);
            return;
        }
        else
        {
            gioSetBit(gioPORTB, 2, 0);
            return;
        }
    }
    /* USER CODE END */

  • Hello  i want to Connect TMS570LS1224 launchpad as spi1 master with microchip dspic33ev256GM106 starter kit as spi slave

    I enabled SPI1 driver in SPI1 Global: i enabled master mode and internal clock
    In SPI1Data Format: i put 100000 hz baudrate
    With 0 polarity and 0 phase
    In SPI1Port i enabled SIMO ,MOSI,CLK,CS[0] and ENA as SPI functional
    And the other CS[1-5] as GIO
    Then generate code I followed spi example code

    My first question
    1) is it true what i did above?
    2) do i need to include these lines in my code?

    spiDAT1_t dataconfig1_t;
    dataconfig1_t.CS_HOLD = true;
    dataconfig1_t.WDEL = true;
    dataconfig1_t.DFSEL = SPI_FMT_0 ;
    dataconfig1_t.CSNR = SPI_CS_0;

    3)do i need to connect power and ground of each board together?

  • Hi B.M,

    For question 1), You test is quite similar to my another test except for ENA. My test is not passed. Here is the url of my post https://e2e.ti.com/support/microcontrollers/hercules/f/312/t/907828.The only different point is.

    For 2) dataconfig is necessary, SPI_FMT_0 defines the number of pulse during one time of writing or reading. I defined it by HelCoGen as below.

    For question 3), I connected GNDs of my two launchpad although my test mentioned has not yet been success.

    Have you tried the test code for two spi modules in your 1224 launchpad ?

  • i successfully connected spi1 with spi3 

    here is the code 

    but i still don't know how to make my spi1 as master to connect with microchip as spi slave4426.spi1 master spi3slave final.rar

  • sounds great. i will learn your code. good luck.

  • The communication between SPI1 and SPI2 or 3 is very straightforward. The example in HALCoGen is a good start point. 

  • Hi QJ,

    Many thanks for your help. Finally, spi communication between TMS570LS1224pge and AD7705 works.

    The key points are :

    1) polarity of SPI is high, phase of SPI is of aligning rising edge and level of master's writing data;

    2) chip select signal ties high during spi is idle;

    3) level shifter from 5V to 3.3V is necessary for signals of SOMI and data ready from AD7705.

    The best way of verifying SPI is observing effect of reset by sending 32 bits of one.

    For flexibility of programming, calling spiTransmitData and spiReceiveData seem like better than calling spiSendAndGetData. 

    Any comment is welcome.

    Kind regards

    Datïan