Decoupling caps on MSP430F5437

Best practice (in most cases) is to decouple as much as possible This includes placing the decoupling capacitors as close to the pins to which they decouple. Therefore, using a capacitor (or two) for each pin is recommended. This is so because the track between the capacitor and the pin will be an antenna by itself, and if the capacitor is very close to the pin then it can help with noise.

If you look at the MSP430F5438 (which is similar to yours), its experimenter board schematic contains decoupling capacitors in each pair of VCC/GND.

http://focus.ti.com/lit/ug/slau263e/slau263e.pdf

Page 30 of the document above shows the schematic. Hopefully it will further assist you in your application.

Gustavo

Greetings,

Thanks for the answer.  In my application, I'll use a single 10 uF as the "bulk" capacitor and 0.1 uF capacitors on each pair of DVcc and DVss pins.  Additionally, a 0.47 uF capacitor is shown connected to Vcore, generated by the internal LDO.  If I'm not using the LDO regulator, how should the Vcore pin be connected?

Thanks,

Mark H.

VCore is used internally by the core. It should be decoupled with a 0.47uF capacitor and not loaded with anything else. From what I remember, the capacitor is used to ensure that the internal core voltage is decoupled.

Gustavo

Hi Gustavo,

I would like to add one note to your explanation.
Because MCU is a digital circuit it can switch internal logic gates very fast. Due to many such gates in microprocessor (sorry for this simplification) and common clock
the switching happens in many gates at the same time. The switching of the gates generates high current pulse flowing from power supply (Vdd) to ground (GND) pins.
If the board has no coupling capacitors very close to these pins, the current flows through power supply tracks to other, nearest capacitor. These tracks are significant inductors (not antenna!) for that pulse. This inductunce togehter with short pulse, that  contains high frequency components results with short supply drop.
When the capacitor is located very close to the chip (serial inductance of the tracks is minimized), the energy for the pulse is taken from the capacitor and hence the power is stable. 

Decoupling capacitor should be manufactured in proper technology designated to such type of work. It is common to place monolitic capacitor 100nF close to each pair of Vdd/GND.

The location of 10uF tantal capacitors is not so critical, but it should be also added to the power circuits and properly routed on PCB.

Another issue is design of mixed signal (analog and digital) PCB, where separated grounds can be used for better noise isolation from digital to analog circuits on the board, but this is another story...

Regards,
Piotr Romaniuk, Ph.D.
ELESOFTROM

Piotr,

Thank you very much for your added explanation.

Gustavo