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MSP430F2132 Timer UART Receive Not working

Other Parts Discussed in Thread: MSP430F2132, MSP-TS430PW28, MSP430F2370

I am using a MSP-TS430PW28 Board. I have burnt the "MSP430F21x2 Code Examples"  "msp430x21x2_uscia0_irda_03.c" code to a MSP430F2132 microcontroller. But the Timer UART Receive Interrupt is not working, hence i am not able to receive any data over UART. I am pasting the code here. The code is compiled using TI Code Composer Studio 4. Please help me. I am in big trouble.

 

 

//******************************************************************************

//  MSP430F21x2 Demo - USCI_A0 IrDA Physical Layer Comm, 8MHz SMCLK

//

//  Description: This example receives bytes through the USCI module

//  configured for IrDA mode, and sends them out using the Timer_A UART

//  to a PC running a terminal software. Likewise, data received from the PC

//  through the Timer_A UART link is transmitted via IrDA.

//

//  ACLK = n/a, MCLK = SMCLK = BRCLK = CALxxx_8MHZ = 8MHz

//

//                                     MSP430F21x2

//                               -----------------------

//                              |                       |

//                           /|\|                    XIN|-

//                            | |                       |

//                            --|RST                XOUT|-

//                              |                       |

//    GP2W0116YPS   /|\         |                       |

//      -------      |          |                       |

//     |    Vcc|-----+  IrDA    |               P2.4/TA2|--> 115,200 8N1

//     #    LED|-----+ 9600 8N1 |               P2.3/TA1|<-- Terminal SW

//     #    TxD|<---------------|P3.4/UCA0TXD           |

//     #    RxD|--------------->|P3.5/UCA0RXD           |

//     #     SD|-----+          |                       |

//     |    GND|-----+          |                       |

//      -------      |           -----------------------

//                  ---

//

//  A. Dannenberg

//  Texas Instruments Inc.

//  April 2006

//  Built with CCE Version: 3.2.0 and IAR Embedded Workbench Version: 3.41A

//******************************************************************************

#include "msp430x21x2.h"

 

#define BITTIME     69                      // UART bit time = 8MHz / 115,200

#define BITTIME_5   35                      // UART half bit time

 

#define FLAG_USCI   0x01                    // USCI data received

#define FLAG_UART   0x02                    // Timer_A UART data received

 

unsigned int TXData;                        // Timer_A UART TX data

unsigned char TxBitCnt;                     // Timer_A UART TX bit counter

unsigned char RXData;                       // Timer_A UART RX data

unsigned char RxBitCnt;                     // Timer_A UART RX bit counter

unsigned char Flags;                        // Flag register

unsigned char RXDataIR;                     // Received IrDA data

 

// Function prototypes

void RX_Ready(void);

void TX_Byte(unsigned char Data);

 

void main(void)

{

  WDTCTL = WDTPW + WDTHOLD;                 // Stop WDT

  if (CALBC1_8MHZ ==0xFF || CALDCO_8MHZ == 0xFF)                                     

  {  

    while(1);                               // If calibration constants erased

                                            // do not load, trap CPU!!

  }   

  DCOCTL = CALDCO_8MHZ;                     // Load 8MHz constants

  BCSCTL1 = CALBC1_8MHZ;

  P2SEL |= 0x18;                            // Use P2.3/P2.4 for Timer_A

  P2DIR |= 0x10;                            // P2.4 output

  P3SEL |= 0x30;                            // Use P3.4/P3.5 for USCI_A0

  UCA0CTL1 |= UCSWRST;                      // Set SW Reset

  UCA0CTL1 = UCSSEL_2 + UCSWRST;

  UCA0BR0 = 52;                             // 8MHz/52=153.8KHz

  UCA0BR1 = 0;

  UCA0MCTL = UCBRF_1 + UCOS16;

  UCA0IRTCTL = UCIRTXPL2 + UCIRTXPL0 + UCIRTXCLK + UCIREN;

                                            // Pulse length = 6 half clock cyc

                                            // Enable BITCLK16, IrDA enc/dec

  UCA0IRRCTL = UCIRRXPL;                    // Light = low pulse

  UCA0CTL1 &= ~UCSWRST;                     // Resume operation

  IE2 |= UCA0RXIE;                          // Enable RX int

  TA0CCTL2 = OUT;                            // TXD Idle as Mark

  TA0CTL = TASSEL_2 + MC_2;                  // SMCLK, continuous mode

  RX_Ready();                               // Ready Timer_A UART for RX

 

  while (1)

  {

    __disable_interrupt();                  // Disable interrupts

    if (!Flags)                             // Any events pending?

      __bis_SR_register(CPUOFF + GIE);      // Enter LPM0 w/ interrupts

 

    __enable_interrupt();                   // Enable interrupts

 

    if (Flags & FLAG_USCI)                  // USCI_A0 character received?

    {

      while (TACCTL2 & CCIE);               // Yes, ensure Timer_A UART is ready

      TX_Byte(RXDataIR);                    // Transmit using Timer_A UART

      Flags &= ~FLAG_USCI;                  // Clear flag

      IE2 |= UCA0RXIE;                      // Re-enable RX int

    }

 

    if (Flags & FLAG_UART)                  // Timer_A UART character received?

    {

      while (!(IFG2 & UCA0TXIFG));          // Ensure TX buffer is ready

      UCA0TXBUF = RXData;                   // Move RX'd character to USCI_A0

      Flags &= ~FLAG_UART;                  // Clear flag

      RX_Ready();                           // Ready Timer_A UART for RX

    }

  }

}

 

//------------------------------------------------------------------------------

// Read RXed character from USCI_A0, return from LPM0

//------------------------------------------------------------------------------

#pragma vector = USCIAB0RX_VECTOR

__interrupt void USCIAB0RX_ISR(void)

{

  RXDataIR = UCA0RXBUF;                     // Get RXed character

  IE2 &= ~UCA0RXIE;                         // Disable RX int

  Flags |= FLAG_USCI;                       // Indicate received character

  __bic_SR_register_on_exit(CPUOFF);        // Return active after receiption

}

 

//------------------------------------------------------------------------------

// Readies the Timer_A UART to receive on byte

//------------------------------------------------------------------------------

void RX_Ready(void)

{

  RxBitCnt = 8;                             // Load Bit counter

  TA0CCTL1 = SCS + CCIS0 + CM1 + CAP + CCIE; // Sync, Neg Edge, Capture

}

 

//------------------------------------------------------------------------------

// TX the byte 'Data' using Timer_A UART

//------------------------------------------------------------------------------

void TX_Byte(unsigned char Data)

{

  TxBitCnt = 10;                            // Load Bit counter, 8 data + ST/SP

  TA0CCR2 = TAR;                             // Current state of TA counter

  TA0CCR2 += BITTIME;                        // Some time till first bit

  TXData = Data;                            // Load global variable

  TXData |= 0x0100;                         // Add mark stop bit

  TXData <<= 1;                             // Add space start bit

  TACCTL2 = OUTMOD0 + CCIE;                 // TXD = mark = idle

}

 

//------------------------------------------------------------------------------

// Timer_A UART RX and TX

//------------------------------------------------------------------------------

#pragma vector=TIMER0_A1_VECTOR

__interrupt void Timer_A1_ISR(void)

{

  switch (__even_in_range(TAIV, 10))        // Use calculated branching

  {

    case  2 :                               // TACCR1 CCIFG - UART RX

      TA0CCR1 += BITTIME;                    // Add Offset to TACCR1

      if (TACCTL1 & CAP)                    // Capture mode = start bit edge

      {

        TA0CCTL1 &= ~CAP;                    // Capture to compare mode

        TACCR1 += BITTIME_5;

      }

      else

      {

        RXData >>= 1;

        if (TA0CCTL1 & SCCI)                 // Get bit waiting in receive latch

          RXData |= 0x80;

        RxBitCnt--;

        if (RxBitCnt == 0)                  // All bits RXed?

        {

          TA0CCTL1 &= ~CCIE;                 // All bits RXed, disable interrupt

          Flags |= FLAG_UART;               // Indicate received character

          __bic_SR_register_on_exit(CPUOFF);// Clear LPM0 bits from 0(SR)

        }

      }

      break;

    case  4 :                               // TACCR2 CCIFG - UART TX

      TA0CCR2 += BITTIME;                    // Add Offset to TACCR2

      if (TxBitCnt == 0)                    // All bits TXed?

      {

        TA0CCTL2 &= ~CCIE;                   // All bits TXed, disable interrupt

        __bic_SR_register_on_exit(CPUOFF);  // Clear LPM0 bits from 0(SR)

      }

      else

      {

        if (TXData & 0x01)

          TA0CCTL2 &= ~OUTMOD2;              // TX Mark

        else

          TA0CCTL2 |= OUTMOD2;               // TX Space

        TXData >>= 1;

        TxBitCnt--;

      }

      break;

  }

}

 

  • There have been some posts recently about RS-232 level shifting.  You need a level shifter between the RS-232 levels from the PC and the logic levels your UART needs to see.  The search feature in the forum should help you find more info.

  • Level shifting is not a problem. I am using FTDI USB to TTL 3.3 converter. My UART levels are ok. Even the same code for MSP430F2370 microcontroller is working fine on MSP430F2370. But the code for MSP430F2132 is not working on MSP430F2132. When I am debugging, no interrupt is raised on UART data receive event on Timer Capture Pin. That is the main problem.

  • Oh, sorry.  It looked like you used Andreas's code directly without modification, so I jumped to the most likely hardware explanation.

    I still think your problem is hardware related, but I don't have any good guesses for you.

    Just for clarification, are you saying that the Timer never gives you an interrupt for the falling edge of the start bit?  (Capture mode)

    Or that it doesn't give you interrupts for the bit samples (compare mode).

    And how are you making your observation that ISRs are not running?

    Jeff

  • Yes, Timer never gives an Interrupt for the falling edge of start bit.

    I am putting a hardware breakpoint using a debugger. The breakpoint s never reached. I have checked with 3 MSP430F2132 uC. Even checked the dev board. There is no short circuit, nothing. Even I have changed to TA0, different TA1 pin. No luck!!

  • Hmmm, I just checked the datasheet. For Timer0_Ar, the signal connections sheet lists for CCR1 register, signal source CCI1B (which you selected with CCIS0) the internal CAOUT signal, not a port pin. So the CCR1 unit is waiting for a signal from the comparator.P2.3 only gets the OUTPUT of this CCR unit, if in compare mode.

    Subhagato Dutta said:
    Even I have changed to TA0, different TA1 pin

    ??? TA0 is the in/output for CCR0.

    For capturing on CCR1, all you can do is using CCI1A which is connected to P1.2. It may be possible (but depends on internal signal connections), that P2.3 signal is routed too to internal TA1 signal. But even if so, you'll need to switch to CCI1A (CCIS_0 setting, which is effectively 0, instead of CCIS0, which is the lowest bit of CCIS - note the underscore)

    I guess on other MSPs of thisfamily, those without a comparator, CCI1B is connected to the TA signal too.

    See section peripherals/Timer0_A3 in the msp430F21x2 device datasheet SLAS578G.pdf

  • Thanks a lot for the help. I will check it out. 

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