MSP430F67671A: ADC Conversion time

Hi Mukku, Thanks for your detailed post!

on slau208q,  ADC10_A, there is "**" notes explain there are two additional clock cycle is needed.

Q1: ADC10_A on MSP430F67671A, 10+2+1 = 13 ADC10CLK is needed

Q2: ADC12_A on MSP430F543xA, 12+1 = 13 ADC12CLK is needed

Hello Xiaodong LI

Thank you for your reply.
Please tell me a little more.

1. ADC10_A

It is described that the tCONVERT(Table5-48/SLAS983A) is 12 x ADC10CLK.
You wrote "ADC10_A on MSP430F67671A, 10+2+1 = 13 ADC10CLK is needed".
Q1.
Is the description of tCONVERT(Table5-48/SLAS983A) defined as (12xADC10CLK) wrong?

Q2.
Why don't you write the 12 x ADC10CLK?

Best Regards,

Hi Mukku

Thanks for your feedback!

I read more on SLAU208Q, I think tCONVERT should be 12 ADC10CLK. there is no "additional" word on "** Two ADC10CLK cycles needed". So, the conversion time should be 10+2 = 12 ADC10CLK. I think you are correct.

Thanks again!

Hello Xiaodong LI

Thank you for your reply.
Let me check the conversion time (tCONVERT) of ADC10_A and ADC12_A again.

1. ADC10_A
① : 10 × ADC10CLK
② : ** Two ADC10CLK cycles needed(2 x ADC10CLK)
③ : 1 × ADC10CLK (Result Stored Into ADC10MEM0, ADC10IFG0 is Set)
(SLAU208Q)

Q1.
Can I understand that the conversion time (tCONVERT) is ① + ② (12 x ADC10CLK)?
(③ is not included in the conversion time (tCONVERT).)

2. ADC12_A
④ : 12 × ADC12CLK
⑤ : 1 × ADC12CLK (Result Stored Into ADC12MEMx, ADC12IFG.x is Set)
(SLAU208Q)

It is described that the conversion time (tCONVERT) is 13xADC12CLK at 8.37 12-Bit ADC, Timing Parameters (SLAS655G).

Q2.
I think that ④ should be 13 x ADC12CLK.
Why ④ is 12 x ADC12CLK?

Best Regards,

Hi Mukku

ADC12_A and ADC10_A are different ADC IP, So, the conversion time (calculation method) are not the same.

I think we can consider using the conversion time parameter on DS.

So,

The conversion time included result storage is 12 x ADC10CLK on ADC10_A.

The conversion time included result storage is 13 x ADC12CLK on ADC12_A.

Thanks!

Hello Xiaodong LI

Thank you for your reply.

You wrote:
The conversion time included result storage is 12 x ADC10CLK on ADC10_A

On the other hand,
Figure 27-6 (SLAU208Q) shows 13 x ADC10CLK(①+②+③).

Q1.
Is the description in Figure 27-6 (SLAU208Q) wrong?

If it is difficult to answer,
Could you check with a designer?

Best Regards,

Hi Mukku

I am checking with experts on your question. it suppose need some time. Once I have the fixed information, I will feedback to you.

Thanks!