Part Number: MSP430F5172
Hello,
I have written a code for taking ADC values using DMA from voltage and current sensors. I am currently using the MODOSC which based on the datasheet is at 5MHz and my sample and hold time is 16 ADC cycles.
So is it correct to say that the effective sampling time is 1/5MHz*16=3.2us (not considering the delay cycles) ?
Does DMA work with other clock modes such as auxiliary clock, master or sub-system master clock? I am not getting the correct ADC values when I use these clocks? Below is the code the configuration that I have for the ADC and DMA and the while loop used in main to get ADC values.
while(1)
{
while (ADC10CTL1 & BUSY); // Wait if ADC10 core is active
ADC10CTL0 |= ADC10ENC + ADC10SC; // Sampling and conversion ready
__bis_SR_register(CPUOFF + GIE); // LPM0, ADC10_ISR will force exit
//__delay_cycles(5000); // Delay between sequence convs
__no_operation(); // BREAKPOINT; check ADC_Result
}
/ Configure ADC Channels
void SetADC (){
ADC10CTL0 = ADC10SHT_2 + ADC10MSC + ADC10ON; // 16xADC clock cycles, multiple sample conversion, ADC10ON
ADC10CTL1 = ADC10SSEL_0+ADC10SHP+ ADC10CONSEQ_1; // ADCCLK = MODOSC; sampling SIGNAL is sourced from the sampling timer, single seq.
ADC10CTL2 = ADC10RES; // 10-bit conversion results
ADC10MCTL0= ADC10INCH_8 + ADC10SREF_1; //Select ADC channel; USE VR+ = VREF and VR- = AVSS
// By default, REFMSTR=1 => REFCTL is used to configure the internal reference
while(REFCTL0 & REFGENBUSY); // If ref generator busy, WAIT
REFCTL0 |= REFVSEL_2 + REFON; // Select internal ref = 2.5V
__delay_cycles (75); // Delay (~75us) for Ref to settle -ADC10 sample & convert = (32+13)*2/SMCLK = 90/SMCLK = 75us
}
void SetDMA(){
// Configure DMA0 (ADC10IFG trigger)
DMACTL0 = DMA0TSEL_24; // ADC10IFG trigger
__data20_write_long((uintptr_t) &DMA0SA,(uintptr_t) &ADC10MEM0); // Source single address
__data20_write_long((uintptr_t) &DMA0DA,(uintptr_t) &ADC_Result[0]); // Update destination array address
DMA0SZ = 0x09; // 8 conversions - number of byte or word transfer
Thank you.
DMA0CTL = DMADT_4 + DMADSTINCR_3 + DMAEN + DMAIE; // Rpt, inc dest, byte access, enable int after seq of convs
}
