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MSP430FR5994: MSP430FR5994 I2C Slave howto hold SCL Low

Part Number: MSP430FR5994

Hi,

in slau367 @ page 829 stands:

"but it can hold SCL low if intervention of the CPU is required after a byte has been
received."

Question is: how can I hold the SCL line low, to signal to the master that some processing must be done?

Direct after reading the rx-buffer the usci i2c module sends an ACK and the master can't recognize that the last command must be processed. Imho holding SCL low while waiting for ACK is the only way for the slave to do this.

  • Hi Paul,

    It is automatic hold the SCL by slave if they didn't read the RXbuffer. You could see in the figure32-10. 

    Bus stalled (SCL held low) if UCBxRXBUF not read. 

  • Hi Allen,

    well this is what I said, the question is how to hold SCL low while the msp430 is processing the data?

  • In the text you quoted, "intervention of the CPU" refers to reading RXBUF. 

    As far as I know there is no way to ask the EUSCI to hold SCL low at some arbitrary time. The clock-stretching cases are listed in UG (SLAU367P) Sec 32.3.7.2.

    Pre-emptively stalling the bus is a somewhat heavy-handed flow control mechanism -- it prevents the master from issuing a Stop (ending the current transaction) and talking to some other bus device. If you're expecting another byte, you can hold back that one (stretch the clock) until you're ready for it, by waiting to read it from RXBUF.

  • Hi Paul,

    It is implement by hardware and follow the I2C protocol spec. Standard I2C protocol spec has introduced that all the I2C interface is open drain structure. When in the same bus, same function pins are the logic AND. Any one could keep the bus low. You could search on google for the standard I2C protocol spec for more details.

    Thanks

  • The wording in UM10204 (rev 6) Sec 3.1.9 does appear to allow preemptive stalling, but as far as I know you can't ask the EUSCI to do it for you. And I would argue that even if you could, you shouldn't.