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SPI communication between MSP430F2013 and Piccolo

Juraj Stredansky
Prodigy 90 points

Other Parts Discussed in Thread: MSP430F2013, TMS320F28035

Hi.

 

In my design I am going to use SPI communication between TMS320F28035 Piccolo and MSP430F2013.  Piccolo is going to be MASTER and MSP430F2013 is going to be SLAVE (only one slave). There will be just one way communication, from SLAVE to MASTER. Therefore there will be  connected  SPISOMI of MSP430F2013 with SPISOMI of Piccolo, and SPICLK pins.

My question is:   why MSP430F2013 doesn't have SPISTE pin. Do I actually need this pin(signal) if there will be just one SLAVE in comunication ?

 

Thank You for answer.

Juraj Stredansky

 

 

  • 0
    Expert 2860 points

    Hi Juraj

    msp430f2xxx slave/master s set arbitrary from its software. If you need to select the mode, you need to set/clear USIMST and USII2C. Please read 14.2.3.2 chapter and see schematic in figure 14-1 in http://focus.ti.com/lit/ug/slau144g/slau144g.pdf

    Regards,
    Piotr Romaniuk, Ph.D.
    ELESOFTROM

     

  • 0
    Guru 227245 points

    Juraj Stredansky said:
    why MSP430F2013 doesn't have SPISTE pin. Do I actually need this pin(signal) if there will be just one SLAVE in comunication

    The USI module in the 2013 has no SPISOMI. Unlike the USCI or USART modules, the input/output direction of the two signals is fixed and does not change if you switch from master to slave. SDO is always the output, SDI always the input,.
    The actual difference between master and slave mode (set by software USI config) is the generation of the clock signal (internal/external) and the direction of the clock pin.
    However, the STE on the USCI module does not determine master or slave mode. It activates/deactivates the output drivers of the chip (without any notice to the software) and helps not clobbering the bus on high-throughput multi-slave systems when in slave mode, or multi-master.
    The USI does not support multi-master this way, nor does it help you freeing the bus when you're one of many slaves. It's up to your software to react on a (separate, plain GPIO) chip select signal fast enough.

    In your case (you're the only slave), you can just ignore all this and connect SDO with SOMI. Then you have to program the USI for slave mode and synchronize it (manually) with the CS signal from the master. (without the CS signal, you can easily lose byte synchronisation - when CS goes high, you need to manually reset the USI, and when it gets low, you have to activate it and provide the data immediately - I suggest using a port with edge interrupt capabilities).

    Since there is no double-buffering in the USI, being an SPI slave is a tricky, time-critical job, as the master won't wait for the slave putting the next data byte into the output register.

    Good luck!

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