DCO Operation WITHOUT Crystal??

The DCO is not very precise. It is (for the 4x family) an oscillator which oscillates in a certain range (1 of 5 overlapping frequency bands) and provides 32 discrete output frequencies. That means, the DCO can only produce 5*32 = 160 different frequencies in the range of 0.65 to 56MHz.. It is unlikely that the exact frequency you want is one of there 160.
So the DCO has an option to switch its output signal between two adjacent frequencies based on the MOD pattern. The MOD pattern lets the DCO run on one frequency for n of 32 cycles and on the next higher for 32-n cycles (evenly distributed over a 32 cycle sequence). This means that the average DCO output can be in one of 32 steps between the real DCO outputs. However, it is only an average. Each individual clock pulse is either one or the other. (which can lead to problems if your timing spans less than a complete 32 clock sequence)

The main problem is that the DCO outputs greatly vary across different individual chips and over temperature and supply voltage.

You see, the problem is not to let the DCO run on a certain frequency, the problem is finding the settings that will make it do. Many of the 2x series devies have calibration values stored in INFO flash. These settings were determined at production tiem for each individual chip and when you copy them over from flash to teh DCO registers, you'll get the desired frequency (usually 1/4/8MHz).

The crystal is required for the FLL feature that is new in the 4x series. Here the clock pulses from the DCO are compared against a stable low-frequency source, and the FLL will adjust the DCO and MOD settings (but not the base range!) over time if the DCO is too slow or too fast. This also produces only an average frequency, averaged over a much larger timespan (several µs, best case 2 reference cycles). The advantage is that you don't need to know the proper settings for the DCo, the drawback is that you need a reference.

Alternatively, you can run a check over all possible settings, put out the resultign DCO signal on a port pin (e.g. MCLK out or ACLK out etc.) and compare it to an external reference (e.g. a frequency counter). Once ou got th proper settings, save them and use them. Then you don't need a crystal.

Alternatively, you can use the FLL, but provide an external clock to the XIN pin (set it to digital clock signal). e.g. 32768Hz. Then let the FLL find the best settings, store them anduse them.

In one of our devices, I have written some stratup code that programs the FLL and waits for it to settle, while an external clock is supplied. Once the FLL has settled, the device switches on an LED, stores the found values and on next reboot it finds the stored values ans skips the calibraiton process.
However, having an external crystal permanently attached is still better, as the FLL can then compensate for temperature drift of the DCO.

Thank you for responding- the information you gave is great, but might have slightly missed what I was getting at.  I have made some progress since my original post- here is where I stand now:

I am trying to use the DCO in the MSP without a crystal, wihtout a crystal at any point.  I understand that without the crystal, I have no ACLK, and therefore cannot use the FLL+ module.   So, without a crystal connected, it seems that the only line of code I need is this:

FLL_CTL0  =  DCOPLUS;

This sets the DCO output pre-divider so that the output is NOT divided (dividing would make the frequency slower).  On the chip I am working with, it seems that the fastest the DCO can operate is 630 kHz.  I have tried setting multiplier and divider bits in the SCFQCTL and SCFI0 registers but they have no effect since there is no f_crystal to reference.  

So, I guess that is the end for me- 630 kHz is the "raw" output of the DCO, and it seems like it is the best it can do, at least on my particular chip.  I guess I will try another chip and see if it is any different.

If you think I am missing something, or there is another setting I can change to increase the DCO, please let me know.  

Thanks again for your response.

Hi sj rose,

You should disable the FLL by setting the SCG0 bit in the SR.  Then the DCO will be free to run faster when you choose which FN_x bit to set and when you select a DCO tap in DCOx.

The reason your DCO is running so slow is because the FLL has reduced the DCO tap and modulation settings to zero based on the fact that the FLL reference pulses never come.  The FLL is minimizing your DCO rate for you.  When you turn off the FLL, you'll be free to modify FN_x and DCOx to your liking, and nothing will change those fields behind your back.  [Edit: The FLL doesn't change FN_x, but it does change DCOx.]

Also I would leave DCOPLUS clear so you can divide the DCO output by 2 to drive MCLK and SMCLK.

One word of warning, though.  Trying to "maximize" the DCO is like dancing with the devil.  The '4619 requires *you* to configure MCLK and SMCLK not to exceed device specs, which depend on supply voltage.  For example, let's say you have a 3.3V supply.  Your MCLK limit would be about 7.35MHz.  If you set up the DCO to generate 14.6 MHz (MCLK = 7.3 MHz) at room temperature, that's great for room temperature, but the device will probably exceed the limit when cold.  Furthermore, the next device might exceed the limit even at room temperature.

Your application requirements and the '4619 data sheet will help you pick safe DCO settings that won't exceed the limit even when cold, even considering part-to-part variation.  Unfortunately, this safe approach can result in your operating 10-20% below the maximum DCO rate under typical circumstances.  Without using the FLL, you can't get much more from MSP430.

Jeff

Jeff,

Thank you for the great response- that was incredibly helpful.  I know maximizing the DCO without any crystal or external reference is dangerous, and I do not want to push the limits but I knew it should be able to hit at least 1 MHz, the 630 kHz just seemd silly.  I see what you are saying about exceeding the device specs and I don't need to go that far, I've got it running at a safe 4 MHz now.  

Thank you so much!

sj

Well, I have maybe written too much about the FLL so the original information (for use without) appeared a bit blurred. Also, tehre was another thread abotu this topic and since I'm just writing a few sentences before I have other things to do, I may have mixed them up a bit.

However, as Jeff already wrote, the cause of your problem was, that the FLL is still active (it always is after a power-up) and detects that after n clock pulses from teh DCO there is still no reference tick. So from teh view of the FLL the DCO must be too fast and is adjusted down. And down. And down to the minimum of the selected frequency range. Which happens to be 630kHz in your case, maybe 800 on a difference chip.

Th key is indeed to disable the FLL, so it does not try to adjust the DCO to a reference which clocks with apparently 0Hz (and 32*0 is still 0).