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Original question:

MSP430FR2676: Captivate project (>32KB) does not fit in FRAM

MSP430FR2676: Interrupts not working when using large-model addressing (mlarge in MSPGCC)

Randy Bijsterbosch1
Prodigy 80 points
Part Number: MSP430FR2676
Other Parts Discussed in Thread: CAPTIVATE-FR2676, CAPTIVATE-PGMR

Hello,

For a project we use the MSP430FR2676 microcontroller. The project uses the MSP430-GCC compiler and it is required to enable large-model addressing because of linkage with TI libraries. The large-model addressing can be enabled by providing the -mlarge compiler flag during compilation. This switches the addressing from 16-bit to 20-bit and uses the MSP430X instructions instead of the default MSP430 instruction set.

We got to this issue since in the Captivate library it was blocked/stuck at the CAPT_blockOnFlag() method after invoking the __bis_SR_register() . When downsizing the issue we found that this issue also occurs in a simple example as described below.

When the -mlarge flag is disabled it compiles successfully and the code is able to run successfully. The code does initialization of peripherals (like clocks, GPIO, etc.) and after the initialization it is put to low power mode using the function call: __bis_SR_register(LPM0_bits | GIE). The system is now waiting for a button press on port 5, and when pressing the button on the evaluation kit it wakes up the device and executes the actions that are defined in the interrupt service routine succesfully.

When the -mlarge flag is enabled it compiles successfully and the code is able to run. However, when we use the same code as in previous example: initialize and go to low power mode after initialization by using the function call: __bis_SR_register(LPM0_bits | GIE). The system is waiting for a button press on port 5, and when the button is pressed it will never reach the interrupt service routine. Instead when invoking the pause button in the debugger it is shown that it got stuck at address 0x000004. When we remove the LPM0_bits argument from the function call, it seems that it gets stuck at 0x000004 immediately after calling the __bis_SR_register() function.

We are using version: "msp430-elf-gcc (Mitto Systems Limited - msp430-gcc 9.3.1.11) 9.3.1" of the MSP430-GCC compiler.

Is it possible that we are missing some compilation flags in order to use this large-model addressing? Or is there anything else what we do wrong (might seem strange since it seems to work with small-model addressing)?

We have also looked at "chapter 8.2 NOP Instructions Required Between Interrupt State Changes" of the MSP-GCC user guide, but this does not seem to have any effect. We also looked at "table 4-3 MSP430 GCC Assembler Options" by applying the flags -Wa,-mu and -Wa,-mn but this also does not have any effect. See https://www.ti.com/lit/ug/slau646f/slau646f.pdf

Thanks for your help.

  • 0
    TI__Guru 71216 points

    Hi Randy,

    As a side note, Its encouraging you were able to build the Captivate Library source in GCC.  So let's see if we can get you over this next hurdle.

    This sounds very much like you are missing a handler for an interrupt source.  What I mean is as soon as you set the GIE bit in the call __bis_SR_register, some interrupt flag is set, and enabled, but the vector table has not been initialized so there is no ISR hander to jump to.  In CCS this is handled automatically by pre-filling all the vector locations with a single jump to a trap function provided by the library.  If you do have a handler, the linker will then put the address of this handler in the table for you. So check all your interrupt sources to see if maybe one is causing this issue and that you have an ISR handler declared for all the peripherals you are using.  A good one to check is UCAx module where the TXIFG is set by default (empty buffer) and if you set the TXIE bit, then later set the GIE - bingo, you have an un-handled interrupt.

  • 0 in reply to Dennis Lehman
    Prodigy 80 points

    Hello Dennis,

    Thank you for your fast reply. It's definitely a good sign that the library is compilable with GCC.

    I will look into your suggestion of unhandled interrupts and come back with information. To be honest, if it is an unhandled interrupt, then it is strange that this phenomenon does not occur with the small-model addressing.

  • 0 in reply to Randy Bijsterbosch1
    TI__Guru 71216 points

    Hi Randy,

    I agree, but this is what the first thought that came to me.  I'm also running this by our SW team for comments. 

    I don't know how GCC handles placement of the ISR handlers, but since the vectors are 16-bit address only, can you check your MAP file to see if they are placed in the lower 64K of memory.

    Here is a snippet from the MSP430FR2676_BSWP example .map file.  You can see there are placed in

    Here is a snippet of the linker file defining the 2-FRAM memory segments in the FR2676, where segment FRAM starts at 0x8000 and extends up to just below the vector table.

  • 0 in reply to Dennis Lehman
    Guru 24615 points

    GCC tags interrupt sections as "lowtext" so they are going to be placed by the linker in the lower section. Linker options also come into play with "--mcode-region=either" being preferred. None is the ill chosen default for this option.

  • 0 in reply to David Schultz
    TI__Guru 71216 points

    If you checked the .map file and don't see any code being placed in addresses beyond of the lower 64K, then I don't know.

    If you create a simple program like the following and single step through it, do you see the same issue?

    void main(void)
{
	WDTCTL = WDTPW | WDTHOLD;
	
	_no_operation();
	__bis_SR_register(LPM0_bits | GIE);
	_no_operation();
}

  • 0 in reply to Dennis Lehman
    Prodigy 80 points

    Hello Dennis and David,

    At first I started with Dennis suggestion, to catch an unhandled interrupt, I declared a handler for each of the vectors and checked if the handler was hit. Unfortunatly the handler was not hit none and still found that the debugger hits the 0x4 address, as can be seen in the screenshot that I attached to this reply.

    Then I started checking the MAP file as Dennis suggested, I found out that the handlers are placed in the lower part of the 64K of memory. However, I also see that the address is not at the FRAM part (0x8000) but the addresses are found in the range of 0x2000. If I look this up in the LD file then this must be the RAM section. We attached the MAP file and the LD file which we use to this reply, could you check if we correctly read this MAP file?

    Furthermore we also checked the compiler flag "--mcode-region=either" as suggested by David. We validated that we defined this compiler flag, and this can be verified in the build.log(compilation log file) file which is attached to this reply. We also saw that the handlers are placed at the ".lowtext" tag, as can be seen in the MAP file attached to this reply.

    At last, we checked the simple program that Dennis provided, we compiled it and executed it successfully, when debugging it stays at the "__bis_SR_register()" line. However, we adapted the simple program a little bit to add an interrupt to the simple program. When running this, it then also jumps to the 0x4 address and gets stuck as can be seen in the attached screenshot. The source file of this simple program is also attached to this reply.

    With all this information we hope that you will be able to reproduce this issue and give us more directions to look at, thank you. 

    Fullscreen 5756.main.c Download 
    /* INCLUDES *******************************************************************/
#include "msp430.h"
#include <gpio.h>
#include <pmm.h>

/* DEFINITIONS ****************************************************************/

/* LOCAL PROTOTYPES ***********************************************************/

/* GLOBAL VARIABLES ***********************************************************/

/* FUNCTIONS ******************************************************************/
static void ISR_Trap_handler();

//------------------------------------------------------------------------------
int main(void)
{
    WDTCTL = WDTPW | WDTHOLD;

    GPIO_setAsInputPinWithPullUpResistor(GPIO_PORT_P5, GPIO_PIN3);
    GPIO_enableInterrupt(GPIO_PORT_P5, GPIO_PIN3);
    GPIO_clearInterrupt(GPIO_PORT_P5, GPIO_PIN3);
    PMM_unlockLPM5();

    _no_operation();
    __bis_SR_register(LPM0_bits | GIE);
    _no_operation();

  return 1;
}

static void ISR_Trap_handler()
{
    while(1);
}

__attribute__((interrupt(PORT5_VECTOR)))
void P5_ISR (void)
{
      ISR_Trap_handler();
}

__attribute__((interrupt(0)))
void ISR_TRAP0(void)
{
      ISR_Trap_handler();
}

__attribute__((interrupt(1)))
void ISR_TRAP1(void)
{
      ISR_Trap_handler();
}

__attribute__((interrupt(2)))
void ISR_TRAP2(void)
{
      ISR_Trap_handler();
}

__attribute__((interrupt(3)))
void ISR_TRAP3(void)
{
      ISR_Trap_handler();
}

__attribute__((interrupt(4)))
void ISR_TRAP4(void)
{
      ISR_Trap_handler();
}

__attribute__((interrupt(5)))
void ISR_TRAP5(void)
{
      ISR_Trap_handler();
}

__attribute__((interrupt(6)))
void ISR_TRAP6(void)
{
      ISR_Trap_handler();
}

__attribute__((interrupt(7)))
void ISR_TRAP7(void)
{
      ISR_Trap_handler();
}

__attribute__((interrupt(8)))
void ISR_TRAP8(void)
{
      ISR_Trap_handler();
}

__attribute__((interrupt(9)))
void ISR_TRAP9(void)
{
      ISR_Trap_handler();
}

__attribute__((interrupt(10)))
void ISR_TRAP10(void)
{
      ISR_Trap_handler();
}

__attribute__((interrupt(11)))
void ISR_TRAP11(void)
{
      ISR_Trap_handler();
}

__attribute__((interrupt(12)))
void ISR_TRAP12(void)
{
      ISR_Trap_handler();
}

__attribute__((interrupt(13)))
void ISR_TRAP13(void)
{
      ISR_Trap_handler();
}

__attribute__((interrupt(14)))
void ISR_TRAP14(void)
{
      ISR_Trap_handler();
}

__attribute__((interrupt(15)))
void ISR_TRAP15(void)
{
      ISR_Trap_handler();
}

__attribute__((interrupt(16)))
void ISR_TRAP16(void)
{
      ISR_Trap_handler();
}

__attribute__((interrupt(17)))
void ISR_TRAP17(void)
{
      ISR_Trap_handler();
}

__attribute__((interrupt(18)))
void ISR_TRAP18(void)
{
      ISR_Trap_handler();
}

__attribute__((interrupt(19)))
void ISR_TRAP19(void)
{
      ISR_Trap_handler();
}

__attribute__((interrupt(20)))
void ISR_TRAP20(void)
{
      ISR_Trap_handler();
}

__attribute__((interrupt(21)))
void ISR_TRAP21(void)
{
      ISR_Trap_handler();
}

__attribute__((interrupt(23)))
void ISR_TRAP23(void)
{
      ISR_Trap_handler();
}

__attribute__((interrupt(24)))
void ISR_TRAP24(void)
{
      ISR_Trap_handler();
}

__attribute__((interrupt(25)))
void ISR_TRAP25(void)
{
      ISR_Trap_handler();
}

__attribute__((interrupt(26)))
void ISR_TRAP26(void)
{
      ISR_Trap_handler();
}

__attribute__((interrupt(28)))
void ISR_TRAP28(void)
{
      ISR_Trap_handler();
}

__attribute__((interrupt(29)))
void ISR_TRAP29(void)
{
      ISR_Trap_handler();
}

__attribute__((interrupt(30)))
void ISR_TRAP30(void)
{
      ISR_Trap_handler();
}

__attribute__((interrupt(32)))
void ISR_TRAP32(void)
{
      ISR_Trap_handler();
}

__attribute__((interrupt(33)))
void ISR_TRAP33(void)
{
      ISR_Trap_handler();
}

__attribute__((interrupt(34)))
void ISR_TRAP34(void)
{
      ISR_Trap_handler();
}

__attribute__((interrupt(35)))
void ISR_TRAP35(void)
{
      ISR_Trap_handler();
}
__attribute__((interrupt(36)))
void ISR_TRAP36(void)
{
      ISR_Trap_handler();
}

__attribute__((interrupt(37)))
void ISR_TRAP37(void)
{
      ISR_Trap_handler();
}

__attribute__((interrupt(38)))
void ISR_TRAP38(void)
{
      ISR_Trap_handler();
}

__attribute__((interrupt(39)))
void ISR_TRAP39(void)
{
      ISR_Trap_handler();
}

__attribute__((interrupt(40)))
void ISR_TRAP40(void)
{
      ISR_Trap_handler();
}

__attribute__((interrupt(41)))
void ISR_TRAP41(void)
{
      ISR_Trap_handler();
}

__attribute__((interrupt(42)))
void ISR_TRAP42(void)
{
      ISR_Trap_handler();
}

__attribute__((interrupt(43)))
void ISR_TRAP43(void)
{
      ISR_Trap_handler();
}

__attribute__((interrupt(44)))
void ISR_TRAP44(void)
{
      ISR_Trap_handler();
}

__attribute__((interrupt(45)))
void ISR_TRAP45(void)
{
      ISR_Trap_handler();
}
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build help: HELP
    stb_map.txt
    Fullscreen msp430fr2676_ld.txt Download 
    /* ============================================================================ */
/* Copyright (c) 2020, Texas Instruments Incorporated                           */
/*  All rights reserved.                                                        */
/*                                                                              */
/*  Redistribution and use in source and binary forms, with or without          */
/*  modification, are permitted provided that the following conditions          */
/*  are met:                                                                    */
/*                                                                              */
/*  *  Redistributions of source code must retain the above copyright           */
/*     notice, this list of conditions and the following disclaimer.            */
/*                                                                              */
/*  *  Redistributions in binary form must reproduce the above copyright        */
/*     notice, this list of conditions and the following disclaimer in the      */
/*     documentation and/or other materials provided with the distribution.     */
/*                                                                              */
/*  *  Neither the name of Texas Instruments Incorporated nor the names of      */
/*     its contributors may be used to endorse or promote products derived      */
/*     from this software without specific prior written permission.            */
/*                                                                              */
/*  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */
/*  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,       */
/*  THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR      */
/*  PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR            */
/*  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,       */
/*  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,         */
/*  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */
/*  OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,    */
/*  WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR     */
/*  OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,              */
/*  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.                          */
/* ============================================================================ */

/* This file supports MSP430FR2676 devices. */
/* Version: 1.211 */
/* Default linker script, for normal executables */

OUTPUT_ARCH(msp430)
ENTRY(_start)

MEMORY {
  TINYRAM          : ORIGIN = 0x0006, LENGTH = 0x001A /* END=0x001F, size 26 */
  BSL0             : ORIGIN = 0x1000, LENGTH = 0x0800 /* END=0x17FF, size 2048 */
  TLVMEM           : ORIGIN = 0x1A00, LENGTH = 0x0200 /* END=0x1BFF, size 512 */
  BOOTCODE         : ORIGIN = 0x1C00, LENGTH = 0x0400 /* END=0x1FFF, size 1024 */
  ROMLIB           : ORIGIN = 0xC0000, LENGTH = 0x4000 /* END=0xC3FFF, size 16384 */
  BSL1             : ORIGIN = 0xFFC00, LENGTH = 0x0400 /* END=0xFFFFF, size 1024 */
  RAM              : ORIGIN = 0x2000, LENGTH = 0x2000 /* END=0x3FFF, size 8192 */
  INFOMEM          : ORIGIN = 0x1800, LENGTH = 0x0200 /* END=0x19FF, size 512 */
  FRAM (rx)        : ORIGIN = 0x8000, LENGTH = 0x7F80 /* END=0xFF7F, size 32640 */
  HIFRAM (rxw)     : ORIGIN = 0x00010000, LENGTH = 0x00007FFF
  JTAGSIGNATURE    : ORIGIN = 0xFF80, LENGTH = 0x0004
  BSLSIGNATURE     : ORIGIN = 0xFF84, LENGTH = 0x0004
  BSLCONFIGURATIONSIGNATURE : ORIGIN = 0xFF88, LENGTH = 0x0002
  BSLCONFIGURATION : ORIGIN = 0xFF8A, LENGTH = 0x0002
  BSLI2CADDRESS    : ORIGIN = 0xFFA0, LENGTH = 0x0002
  VECT0            : ORIGIN = 0xFFA2, LENGTH = 0x0002
  VECT1            : ORIGIN = 0xFFA4, LENGTH = 0x0002
  VECT2            : ORIGIN = 0xFFA6, LENGTH = 0x0002
  VECT3            : ORIGIN = 0xFFA8, LENGTH = 0x0002
  VECT4            : ORIGIN = 0xFFAA, LENGTH = 0x0002
  VECT5            : ORIGIN = 0xFFAC, LENGTH = 0x0002
  VECT6            : ORIGIN = 0xFFAE, LENGTH = 0x0002
  VECT7            : ORIGIN = 0xFFB0, LENGTH = 0x0002
  VECT8            : ORIGIN = 0xFFB2, LENGTH = 0x0002
  VECT9            : ORIGIN = 0xFFB4, LENGTH = 0x0002
  VECT10           : ORIGIN = 0xFFB6, LENGTH = 0x0002
  VECT11           : ORIGIN = 0xFFB8, LENGTH = 0x0002
  VECT12           : ORIGIN = 0xFFBA, LENGTH = 0x0002
  VECT13           : ORIGIN = 0xFFBC, LENGTH = 0x0002
  VECT14           : ORIGIN = 0xFFBE, LENGTH = 0x0002
  VECT15           : ORIGIN = 0xFFC0, LENGTH = 0x0002
  VECT16           : ORIGIN = 0xFFC2, LENGTH = 0x0002
  VECT17           : ORIGIN = 0xFFC4, LENGTH = 0x0002
  VECT18           : ORIGIN = 0xFFC6, LENGTH = 0x0002
  VECT19           : ORIGIN = 0xFFC8, LENGTH = 0x0002
  VECT20           : ORIGIN = 0xFFCA, LENGTH = 0x0002
  VECT21           : ORIGIN = 0xFFCC, LENGTH = 0x0002
  VECT22           : ORIGIN = 0xFFCE, LENGTH = 0x0002
  VECT23           : ORIGIN = 0xFFD0, LENGTH = 0x0002
  VECT24           : ORIGIN = 0xFFD2, LENGTH = 0x0002
  VECT25           : ORIGIN = 0xFFD4, LENGTH = 0x0002
  VECT26           : ORIGIN = 0xFFD6, LENGTH = 0x0002
  VECT27           : ORIGIN = 0xFFD8, LENGTH = 0x0002
  VECT28           : ORIGIN = 0xFFDA, LENGTH = 0x0002
  VECT29           : ORIGIN = 0xFFDC, LENGTH = 0x0002
  VECT30           : ORIGIN = 0xFFDE, LENGTH = 0x0002
  VECT31           : ORIGIN = 0xFFE0, LENGTH = 0x0002
  VECT32           : ORIGIN = 0xFFE2, LENGTH = 0x0002
  VECT33           : ORIGIN = 0xFFE4, LENGTH = 0x0002
  VECT34           : ORIGIN = 0xFFE6, LENGTH = 0x0002
  VECT35           : ORIGIN = 0xFFE8, LENGTH = 0x0002
  VECT36           : ORIGIN = 0xFFEA, LENGTH = 0x0002
  VECT37           : ORIGIN = 0xFFEC, LENGTH = 0x0002
  VECT38           : ORIGIN = 0xFFEE, LENGTH = 0x0002
  VECT39           : ORIGIN = 0xFFF0, LENGTH = 0x0002
  VECT40           : ORIGIN = 0xFFF2, LENGTH = 0x0002
  VECT41           : ORIGIN = 0xFFF4, LENGTH = 0x0002
  VECT42           : ORIGIN = 0xFFF6, LENGTH = 0x0002
  VECT43           : ORIGIN = 0xFFF8, LENGTH = 0x0002
  VECT44           : ORIGIN = 0xFFFA, LENGTH = 0x0002
  VECT45           : ORIGIN = 0xFFFC, LENGTH = 0x0002
  RESETVEC         : ORIGIN = 0xFFFE, LENGTH = 0x0002
}

SECTIONS
{
  .jtagsignature      : {} > JTAGSIGNATURE
  .bslsignature       : {} > BSLSIGNATURE
  .bslconfigsignature : {} > BSLCONFIGURATIONSIGNATURE
  .bslconfig          : {} > BSLCONFIGURATION
  .bsli2caddress      : {} > BSLI2CADDRESS

  __interrupt_vector_0   : { KEEP (*(__interrupt_vector_0 )) } > VECT0
  __interrupt_vector_1   : { KEEP (*(__interrupt_vector_1 )) } > VECT1
  __interrupt_vector_2   : { KEEP (*(__interrupt_vector_2 )) } > VECT2
  __interrupt_vector_3   : { KEEP (*(__interrupt_vector_3 )) } > VECT3
  __interrupt_vector_4   : { KEEP (*(__interrupt_vector_4 )) } > VECT4
  __interrupt_vector_5   : { KEEP (*(__interrupt_vector_5 )) } > VECT5
  __interrupt_vector_6   : { KEEP (*(__interrupt_vector_6 )) } > VECT6
  __interrupt_vector_7   : { KEEP (*(__interrupt_vector_7 )) } > VECT7
  __interrupt_vector_8   : { KEEP (*(__interrupt_vector_8 )) } > VECT8
  __interrupt_vector_9   : { KEEP (*(__interrupt_vector_9 )) } > VECT9
  __interrupt_vector_10  : { KEEP (*(__interrupt_vector_10)) } > VECT10
  __interrupt_vector_11  : { KEEP (*(__interrupt_vector_11)) } > VECT11
  __interrupt_vector_12  : { KEEP (*(__interrupt_vector_12)) } > VECT12
  __interrupt_vector_13  : { KEEP (*(__interrupt_vector_13)) } > VECT13
  __interrupt_vector_14  : { KEEP (*(__interrupt_vector_14)) } > VECT14
  __interrupt_vector_15  : { KEEP (*(__interrupt_vector_15)) } > VECT15
  __interrupt_vector_16  : { KEEP (*(__interrupt_vector_16)) } > VECT16
  __interrupt_vector_17  : { KEEP (*(__interrupt_vector_17)) } > VECT17
  __interrupt_vector_18  : { KEEP (*(__interrupt_vector_18)) } > VECT18
  __interrupt_vector_19  : { KEEP (*(__interrupt_vector_19)) KEEP (*(__interrupt_vector_captivate)) } > VECT19
  __interrupt_vector_20  : { KEEP (*(__interrupt_vector_20)) KEEP (*(__interrupt_vector_ecomp0)) } > VECT20
  __interrupt_vector_21  : { KEEP (*(__interrupt_vector_21)) KEEP (*(__interrupt_vector_port6)) } > VECT21
  __interrupt_vector_22  : { KEEP (*(__interrupt_vector_22)) KEEP (*(__interrupt_vector_port5)) } > VECT22
  __interrupt_vector_23  : { KEEP (*(__interrupt_vector_23)) KEEP (*(__interrupt_vector_port4)) } > VECT23
  __interrupt_vector_24  : { KEEP (*(__interrupt_vector_24)) KEEP (*(__interrupt_vector_port3)) } > VECT24
  __interrupt_vector_25  : { KEEP (*(__interrupt_vector_25)) KEEP (*(__interrupt_vector_port2)) } > VECT25
  __interrupt_vector_26  : { KEEP (*(__interrupt_vector_26)) KEEP (*(__interrupt_vector_port1)) } > VECT26
  __interrupt_vector_27  : { KEEP (*(__interrupt_vector_27)) KEEP (*(__interrupt_vector_adc)) } > VECT27
  __interrupt_vector_28  : { KEEP (*(__interrupt_vector_28)) KEEP (*(__interrupt_vector_eusci_b1)) } > VECT28
  __interrupt_vector_29  : { KEEP (*(__interrupt_vector_29)) KEEP (*(__interrupt_vector_eusci_b0)) } > VECT29
  __interrupt_vector_30  : { KEEP (*(__interrupt_vector_30)) KEEP (*(__interrupt_vector_eusci_a1)) } > VECT30
  __interrupt_vector_31  : { KEEP (*(__interrupt_vector_31)) KEEP (*(__interrupt_vector_eusci_a0)) } > VECT31
  __interrupt_vector_32  : { KEEP (*(__interrupt_vector_32)) KEEP (*(__interrupt_vector_wdt)) } > VECT32
  __interrupt_vector_33  : { KEEP (*(__interrupt_vector_33)) KEEP (*(__interrupt_vector_rtc)) } > VECT33
  __interrupt_vector_34  : { KEEP (*(__interrupt_vector_34)) KEEP (*(__interrupt_vector_timer0_b1)) } > VECT34
  __interrupt_vector_35  : { KEEP (*(__interrupt_vector_35)) KEEP (*(__interrupt_vector_timer0_b0)) } > VECT35
  __interrupt_vector_36  : { KEEP (*(__interrupt_vector_36)) KEEP (*(__interrupt_vector_timer3_a1)) } > VECT36
  __interrupt_vector_37  : { KEEP (*(__interrupt_vector_37)) KEEP (*(__interrupt_vector_timer3_a0)) } > VECT37
  __interrupt_vector_38  : { KEEP (*(__interrupt_vector_38)) KEEP (*(__interrupt_vector_timer2_a1)) } > VECT38
  __interrupt_vector_39  : { KEEP (*(__interrupt_vector_39)) KEEP (*(__interrupt_vector_timer2_a0)) } > VECT39
  __interrupt_vector_40  : { KEEP (*(__interrupt_vector_40)) KEEP (*(__interrupt_vector_timer1_a1)) } > VECT40
  __interrupt_vector_41  : { KEEP (*(__interrupt_vector_41)) KEEP (*(__interrupt_vector_timer1_a0)) } > VECT41
  __interrupt_vector_42  : { KEEP (*(__interrupt_vector_42)) KEEP (*(__interrupt_vector_timer0_a1)) } > VECT42
  __interrupt_vector_43  : { KEEP (*(__interrupt_vector_43)) KEEP (*(__interrupt_vector_timer0_a0)) } > VECT43
  __interrupt_vector_44  : { KEEP (*(__interrupt_vector_44)) KEEP (*(__interrupt_vector_unmi)) } > VECT44
  __interrupt_vector_45  : { KEEP (*(__interrupt_vector_45)) KEEP (*(__interrupt_vector_sysnmi)) } > VECT45
  __reset_vector :
  {
    KEEP (*(__interrupt_vector_46))
    KEEP (*(__interrupt_vector_reset))
    KEEP (*(.resetvec))
  } > RESETVEC

  .lower.rodata :
  {
    . = ALIGN(2);
    *(.lower.rodata.* .lower.rodata)
  } > FRAM

  .rodata :
  {
    . = ALIGN(2);
    *(.plt)
    *(.rodata .rodata.* .gnu.linkonce.r.* .const .const:*)
    *(.rodata1)
    KEEP (*(.gcc_except_table)) *(.gcc_except_table.*)
  } > FRAM

  /* Note: This is a separate .rodata section for sections which are
     read only but which older linkers treat as read-write.
     This prevents older linkers from marking the entire .rodata
     section as read-write.  */
  .rodata2 :
  {
    . = ALIGN(2);
    PROVIDE (__preinit_array_start = .);
    KEEP (*(.preinit_array))
    PROVIDE (__preinit_array_end = .);
    . = ALIGN(2);
    PROVIDE (__init_array_start = .);
    KEEP (*(SORT(.init_array.*)))
    KEEP (*(.init_array))
    PROVIDE (__init_array_end = .);
    . = ALIGN(2);
    PROVIDE (__fini_array_start = .);
    KEEP (*(.fini_array))
    KEEP (*(SORT(.fini_array.*)))
    PROVIDE (__fini_array_end = .);
    . = ALIGN(2);
    *(.eh_frame_hdr)
    KEEP (*(.eh_frame))

    /* gcc uses crtbegin.o to find the start of the constructors, so
       we make sure it is first.  Because this is a wildcard, it
       doesn't matter if the user does not actually link against
       crtbegin.o; the linker won't look for a file to match a
       wildcard.  The wildcard also means that it doesn't matter which
       directory crtbegin.o is in.  */
    KEEP (*crtbegin*.o(.ctors))

    /* We don't want to include the .ctor section from the crtend.o
       file until after the sorted ctors.  The .ctor section from
       the crtend file contains the end of ctors marker and it must
       be last */
    KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
    KEEP (*(SORT(.ctors.*)))
    KEEP (*(.ctors))

    KEEP (*crtbegin*.o(.dtors))
    KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
    KEEP (*(SORT(.dtors.*)))
    KEEP (*(.dtors))
  } > FRAM

  .upper.rodata :
  {
    *(.upper.rodata.* .upper.rodata)
  } > HIFRAM

  /* This section contains data that is initialised during load
     but not on application reset.  */
  .persistent :
  {
    . = ALIGN(2);
    PROVIDE (__persistent_start = .);
    *(.persistent)
    . = ALIGN(2);
    PROVIDE (__persistent_end = .);
  } > FRAM

  .tinyram : {} > TINYRAM

  .lower.data :
  {
    . = ALIGN(2);
    PROVIDE (__datastart = .);
    *(.lower.data.* .lower.data)
  } > RAM AT> FRAM

  .data :
  {
    . = ALIGN(2);

    KEEP (*(.jcr))
    *(.data.rel.ro.local) *(.data.rel.ro*)
    *(.dynamic)

    *(.data .data.* .gnu.linkonce.d.*)
    KEEP (*(.gnu.linkonce.d.*personality*))
    SORT(CONSTRUCTORS)
    *(.data1)
    *(.got.plt) *(.got)

    /* We want the small data sections together, so single-instruction offsets
       can access them all, and initialized data all before uninitialized, so
       we can shorten the on-disk segment size.  */
    . = ALIGN(2);
    *(.sdata .sdata.* .gnu.linkonce.s.* D_2 D_1)

    . = ALIGN(2);

    _edata = .;
    PROVIDE (edata = .);
    PROVIDE (__dataend = .);
  } > RAM AT> FRAM

  /* Note that crt0 assumes this is a multiple of two; all the
     start/stop symbols are also assumed word-aligned.  */
  PROVIDE(__romdatastart = LOADADDR(.lower.data));
  PROVIDE (__romdatacopysize = SIZEOF(.lower.data) + SIZEOF(.data));

  .upper.data :
  {
    __upper_data_init = LOADADDR (.upper.data);
    /* Status word.  */
    SHORT(1);
    __high_datastart = .;
    *(.upper.data.* .upper.data)
    __high_dataend = .;
  } > HIFRAM AT> FRAM

  __rom_highdatacopysize = SIZEOF(.upper.data) - 2;
  __rom_highdatastart = LOADADDR(.upper.data) + 2;

  .lower.bss :
  {
    . = ALIGN(2);
    PROVIDE (__bssstart = .);
    *(.lower.bss.* .lower.bss)
  } > RAM

  .bss :
  {
    . = ALIGN(2);
    *(.dynbss)
    *(.sbss .sbss.*)
    *(.bss .bss.* .gnu.linkonce.b.*)
    . = ALIGN(2);
    *(COMMON)
    PROVIDE (__bssend = .);
  } > RAM
  PROVIDE (__bsssize = SIZEOF(.lower.bss) + SIZEOF(.bss));

  .upper.bss :
  {
    . = ALIGN(2);
    __high_bssstart = .;
    *(.upper.bss.* .upper.bss)
    . = ALIGN(2);
    __high_bssend = .;
  } > HIFRAM
  __high_bsssize = SIZEOF(.upper.bss);

  /* This section contains data that is not initialised during load
     or application reset.  */
  .noinit (NOLOAD) :
  {
    . = ALIGN(2);
    PROVIDE (__noinit_start = .);
    *(.noinit)
    . = ALIGN(2);
    PROVIDE (__noinit_end = .);
  } > RAM

  /* We create this section so that "end" will always be in the
     RAM region (matching .stack below), even if the .bss
     section is empty.  */
  .heap (NOLOAD) :
  {
    . = ALIGN(2);
    __heap_start__ = .;
    _end = __heap_start__;
    PROVIDE (end = .);
    KEEP (*(.heap))
    _end = .;
    PROVIDE (end = .);
    /* This word is here so that the section is not empty, and thus
       not discarded by the linker.  The actual value does not matter
       and is ignored.  */
    LONG(0);
    __heap_end__ = .;
    __HeapLimit = __heap_end__;
  } > RAM
  /* WARNING: Do not place anything in RAM here.
     The heap section must be the last section in RAM and the stack
     section must be placed at the very end of the RAM region.  */

  .stack (ORIGIN (RAM) + LENGTH(RAM)) :
  {
    PROVIDE (__stack = .);
    *(.stack)
  }

  .lower.text :
  {
    . = ALIGN(2);
    *(.lower.text.* .lower.text)
  } > FRAM

  .text :
  {
    PROVIDE (_start = .);

    . = ALIGN(2);
    KEEP (*(SORT(.crt_*)))

    . = ALIGN(2);
    *(.text .stub .text.* .gnu.linkonce.t.* .text:*)

    KEEP (*(.text.*personality*))
    /* .gnu.warning sections are handled specially by elf32.em.  */
    *(.gnu.warning)
    *(.interp .hash .dynsym .dynstr .gnu.version*)
    PROVIDE (__etext = .);
    PROVIDE (_etext = .);
    PROVIDE (etext = .);
    . = ALIGN(2);
    KEEP (*(.init))
    KEEP (*(.fini))
    KEEP (*(.tm_clone_table))
  } > FRAM

  .upper.text :
  {
    . = ALIGN(2);
    *(.upper.text.* .upper.text)
  } > HIFRAM

  .info (NOLOAD) : {} > INFOMEM              /* MSP430 INFO FLASH MEMORY SEGMENTS */

  /* The rest are all not normally part of the runtime image.  */

  .MSP430.attributes 0 :
  {
    KEEP (*(.MSP430.attributes))
    KEEP (*(.gnu.attributes))
    KEEP (*(__TI_build_attributes))
  }

  /* Stabs debugging sections.  */
  .stab          0 : { *(.stab) }
  .stabstr       0 : { *(.stabstr) }
  .stab.excl     0 : { *(.stab.excl) }
  .stab.exclstr  0 : { *(.stab.exclstr) }
  .stab.index    0 : { *(.stab.index) }
  .stab.indexstr 0 : { *(.stab.indexstr) }
  .comment       0 : { *(.comment) }
  /* DWARF debug sections.
     Symbols in the DWARF debugging sections are relative to the beginning
     of the section so we begin them at 0.  */
  /* DWARF 1.  */
  .debug          0 : { *(.debug) }
  .line           0 : { *(.line) }
  /* GNU DWARF 1 extensions.  */
  .debug_srcinfo  0 : { *(.debug_srcinfo) }
  .debug_sfnames  0 : { *(.debug_sfnames) }
  /* DWARF 1.1 and DWARF 2.  */
  .debug_aranges  0 : { *(.debug_aranges) }
  .debug_pubnames 0 : { *(.debug_pubnames) }
  /* DWARF 2.  */
  .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
  .debug_abbrev   0 : { *(.debug_abbrev) }
  .debug_line     0 : { *(.debug_line .debug_line.* .debug_line_end ) }
  .debug_frame    0 : { *(.debug_frame) }
  .debug_str      0 : { *(.debug_str) }
  .debug_loc      0 : { *(.debug_loc) }
  .debug_macinfo  0 : { *(.debug_macinfo) }
  /* SGI/MIPS DWARF 2 extensions.  */
  .debug_weaknames 0 : { *(.debug_weaknames) }
  .debug_funcnames 0 : { *(.debug_funcnames) }
  .debug_typenames 0 : { *(.debug_typenames) }
  .debug_varnames  0 : { *(.debug_varnames) }
  /* DWARF 3 */
  .debug_pubtypes 0 : { *(.debug_pubtypes) }
  .debug_ranges   0 : { *(.debug_ranges) }
  /* DWARF Extension.  */
  .debug_macro    0 : { *(.debug_macro) }

  /DISCARD/ : { *(.note.GNU-stack) }
}


/****************************************************************************/
/* Include peripherals memory map                                           */
/****************************************************************************/

INCLUDE msp430fr2676_symbols.ld

  • 0 in reply to Randy Bijsterbosch1
    Guru 24615 points

    The linker script is fine as it places lower.text in FRAM. But the map file shows something different:

    .lowtext        0x0000000000002000      0x108 load address 0x00000000000080c4
 .lowtext       0x0000000000002000      0x108 stb/CMakeFiles/stb.dir/src/main.c.o
                0x0000000000002000                P5_ISR
                0x0000000000002006                ISR_TRAP0
                0x000000000000200c                ISR_TRAP1
                0x0000000000002012                ISR_TRAP2

etc.

    Looking at the linker script I do not find lowtext defined in msp430fr2676.ld. A quick grep finds it in many other scripts such as for the fr5969:

      .text :
  {
    PROVIDE (_start = .);

    . = ALIGN(2);
    KEEP (*(SORT(.crt_*)))

    . = ALIGN(2);
    KEEP (*(.lowtext))

    So this would appear to be an error in the linker script for the fr2676. Try editing the script to add the .lowtext symbol.

  • 0 in reply to Randy Bijsterbosch1
    TI__Guru 71216 points

    Hi Randy,

    I compiled the following code snippet with the TI GNU compiler (Mitto Systems 9.3.1.11) and single stepped through. What is not show are the ISR vectors and trap that I copied from your code.  With the timer interrupt enabled and stepping through the __bis_SR_register(LPM0_bits | GIE), the code immediately vectors to the proper trap for the the timer, as it should.  I tried both small and large memory models.

    int main(void)
{
    WDTCTL = WDTPW | WDTHOLD;

    TA0CTL |= MC__UP | TASSEL_2;
    TA0CTL |= TAIE | TAIFG;

   __bis_SR_register(LPM0_bits | GIE);

}

    Here is my disassembly.  Verify you have a NOP before and after the __bis_SR_register(LPM0_bits | GIE);

    Also, what debugger are you using?

  • 0 in reply to Dennis Lehman
    Prodigy 80 points

    Hello David and Dennis,

    At first we have tried the suggestion of David to change the linker script. When adding the ".lowtext" symbol to the linker file all the addresses of the ISR handlers changed from 0x2xxx to around 0x8xxx. When testing the basic example that we provided earlier with the button, now seems to have started working, it now hits the ISR as expected and does not get stuck in some place. When verifying the linker script, I saw that we used version 1.211 and I saw in the toolchain directory that a newer version 1.212 was available. We compared both files and saw that the only difference between those files was that the "lowtext" section was added. This means that this issue is fixed in version 1.212 of the linker script.

    Now that the basic example works we have put back the Captivate library to check if this now also works. When running this we found out that this fix did not completely resolved our issue. It is seen that the CAPT_ISR handler is called due to a end of conversion interrupt when calling the CAPT_calibrateUI() when starting the device. However it now seems that after completing the interrupt, that it does not return to the point where it went in low power mode, instead it ends up in the 0x4 address again. Once again we removed the MAP_* prefix of the methods to debug the scenario. This is when we again get to the CAPT_blockOnFlag() method where it tries to enter low power mode and waits until the end of conversion flag is set. When opening the disassembly it is seen that there are no NOP instructions before and after the __bis_SR_register() call. When inserting the __no_operation() call before and after it seems to continue the calibration.

    We have made a step in the good direction with the adaptation of the linker script, but we are not quite sure how to resolve this, since this is usually part of the ROM code. We will investigate it in more detail, but we hope that you maybe have more pointers to look at.

    Regarding the debugger, we are using the TI Code Composer Studio built-in debugger in combination with the CAPTIVATE-FR2676 Evaluation board and CAPTIVATE-PGMR programmer/debug board.

  • 0 in reply to Randy Bijsterbosch1
    TI__Guru 71216 points

    Thanks Randy for the great effort in narrowing down the issue.  I'll dig into this on my side.

    Just for clarification:

    Randy Bijsterbosch1 said:
    When opening the disassembly it is seen that there are no NOP instructions before and after the __bis_SR_register() call. When inserting the __no_operation() call before and after it seems to continue the calibration.

    Do you mean putting the nop() instruction before and after prevent the code from ending up at 0x0004 and the calibration routine completes and moves on, ie. code runs as expected?

  • 0 in reply to Dennis Lehman
    Prodigy 80 points

    That is correct, when placing the nop() instuctions around the __bis_SR_register() call in the CAPT_blockOnFlag() method, we complete the calibration routine. However, when we run the code after the calibration it does not run successfully but gets stuck again at 0x4 or hitting the errno() as can be seen in the screenshot attached. Just a theory, is it possible that it gets stuck at another point because at that point are also no nops() around __bis_SR_register?

    As additional information, we created a seperate module for Captivate called CPT, where we use the simple code example shown as described in the link below. Note that the CPT_Run() method is called continously in a top level "while-loop".

     http://software-dl.ti.com/msp430/msp430_public_sw/mcu/msp430/CapTIvate_Design_Center/latest/exports/docs/users_guide/html/CapTIvate_Technology_Guide_html/markdown/ch_library.html#simple-code-example

  • 0 in reply to Randy Bijsterbosch1
    Guru 24615 points

    The purpose of putting a NOP instruction when setting/clearing GIE is because of timing. For example, it is possible that the instruction after clearing GIE will start executing before interrupts are disabled. If the intent was to protect the following instructions from being interrupted, that would be a problem. So they are  automagically inserted by the compiler.

    From 'info as'

    '-mn'
     enables the generation of a NOP instruction following any
     instruction that might change the interrupts enabled/disabled
     state.  The pipelined nature of the MSP430 core means that any
     instruction that changes the interrupt state ('EINT', 'DINT', 'BIC
     #8, SR', 'BIS #8, SR' or 'MOV.W <>, SR') must be followed by a NOP
     instruction in order to ensure the correct processing of
     interrupts.  By default it is up to the programmer to supply these
     NOP instructions, but this command-line option enables the
     automatic insertion by the assembler, if they are missing.

  • 0 in reply to David Schultz
    Prodigy 80 points

    Hello David,

    We added the "-Wa,-mn" compiler flag and it now does seems to execute the CAPT_updateUI() method continously, meaning that it does not get stuck anymore. When pausing the code I see that it stops somewhere and the debugger shows the __errno() file, but when stepping further, or breakpointing into our code it gets to code that is recognized and can be debugged.

    While the CAPT_updateUI() method is running, we do not see the touches/proximity being sensed yet, and also see that the 'bCalibrationError' flag is set to 1. This is the last status at this moment, we will dive more into this and get back to you and Dennis with more information.

    Regarding the compiler flags, is it correct that the '-mdata-region' flag is set to none? Or does this also require the either value?

  • 0 in reply to Randy Bijsterbosch1
    Guru 24615 points

    Sending the -mn flag to the assembler shouldn't be required unless you are doing something funny in assembler. The compiler adds NOPs, needed or not, when fiddling with GIE. The assembler will (or at least it did) issue a warning if it thinks a NOP is needed.

    They are rarely really needed.

    Since all of SRAM is in lower memory, none should work just fine. It might be useful if you use a lot of memory flagged as persistent. Which gets placed in FRAM.

  • +1 in reply to David Schultz
    Prodigy 80 points

    Thank you for your help Dennis and David! At the moment, it seems like we are able to execute our own code in combination with the Captivate library. We are able to toggle a LED when proximity is sensed with the MAP_CAPT_getGlobalUIProximityStatus(), very basic but it is a good starting point from which to extend.

    To summarize: make sure that the linker script contains the ".lowtext" symbol (use version 1.212), use the linker flag "--mcode-region=either", and the "'-mn" compiler flag did the job. The last points that were missing from my side was the incorrect definition of ISR handlers, not only for Captivate but also for GPIO, UART, ADC etc. For others, when using the MSP-GCC it is required to use the "__attribute__((interrupt(CAPTIVATE_VECTOR))" definition instead of using #pragma vector=CAPTIVATE_VECTOR. We checked this earlier but due to the building system, which refreshes the external sources when cleaning the output, it was erased and restored to the original definition used for the normal compiler.

    Once again, thank you for your contribution to this work!

  • 0 in reply to Randy Bijsterbosch1
    TI__Guru 71216 points

    Excellent work Randy.  This is extremely helpful to TI as this confirms the Captivate Library can be re-compiled with GCC and work.  You have provided a great summary for the community going forward, so again, I thank you for your work and thank you  David for helping with the GCC related flags.

    Since it looks like you are one your way, I'll mark this post as resolved.  If this isn’t the case, please click the "This did NOT resolve my issue" button and reply to this thread with more information.
    If this thread locks, please click the "Ask a related question" button and in the new thread describe the current status of your issue and any additional details you may have to assist us in helping to solve your issues.

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