I'm building and device that require to sample 3 phase current, i'm using two ADC channels to sample every phase (total 8 channels)
if the high gain channel get saturated i use the low gain channel.
The problem the ADC reading in the low gain case is some how dependent on the balance of the three phase
if the three phase are close to perfect balance the readings has minim error less than 1%.
if the the balance is poor the readings error get worse up to like 5-8%
the channels are totally independent both in S/W and H/W.
- I'm using a good ground plane for the ADC common point.
- ADC 12 bits is running in repeated sequence of channel mode (repeated autoscan)
- ADC clk is 5Mhz
- CPU clk is 24Mhz
- Vcc is 3.3vdc and Vref is external 3V reference
I'm using IAR workbench for MSP v 8.xx,
appreciate your help to avoid this issue.
