MSP430F6746: XT1 LF mode as FLL reference clock source

Hi Koichiro,

yes and no.  You are correct if XT1 fails, REFO becomes the reference clock for the DCO.  But, after switched to REFO, if XT1 starts working, the clocks don’t automatically switch back to using XT1.  It is possible to monitor the state of the XT1 and manually switch it back though.

Hi Dennis,

Thanks for your quick reply.

Dennis Lehman said:

But, after switched to REFO, if XT1 starts working, the clocks don’t automatically switch back to using XT1.  It is possible to monitor the state of the XT1 and manually switch it back though.

So user needs to check XT1 status and manually switch FLL reference clock to XT1.
I have two questions.
1) To check XT1 status, the software once clears XT1LFOFFG, then checks XT1LFOFFG bit status?
If set, XT1 is still in fault state. If not set, XT1 is now stable.
2) I guess an oscillator fault does not change SELREF bit  setting in register, even the reference clock is switched to REFO. 
So SELREF bit is still 000b(XT1CLK).
To configure FLL reference clock manually, SELREF bit should be set 000b again?

Thanks and regards,
Koichiro Tashiro

Hi Koichiro,

My guess would be if XT1 fails or fails to start, it won't suddenly start working some time later.  Typically, if XT1 fails, its probably due to a bad crystal and remains bad.

What is the application?  Is there a reason the device can't operate on REFO ( other than it draws a few more uA)?

Hi Dennis,

There is no such issue happens at customer. This is just a question for TRM description.
As TRM section 5.2 says below, customer wonders what actions need to be taken by user software.
"When a 32768-Hz crystal is used for XT1CLK, the fault control logic immediately causes ACLK to be sourced by the
REFOCLK, because XT1 is not stable immediately (see Section 5.2.12). When crystal start-up is obtained
and settled, the FLL stabilizes MCLK and SMCLK to 1.048576 MHz and fDCO = 2.097152 MHz."

At power-up, XT1CLK needs sometime to get stabilized and REFOCLK is used as FLL reference clock, right?
Then XT1CLK is stabilized in 500ms or 1000ms (according to Datasheet section 5.16).
Customer wants to know whether user needs to switch back FLL reference clock to XT1CLK manually or not.
And your answer below means "Yes"

Dennis Lehman said:

after switched to REFO, if XT1 starts working, the clocks don’t automatically switch back to using XT1.  It is possible to monitor the state of the XT1 and manually switch it back though.

Now I have below questions. Please answer them. 

Koichiro Tashiro said:

1) To check XT1 status, the software once clears XT1LFOFFG, then checks XT1LFOFFG bit status?
If set, XT1 is still in fault state. If not set, XT1 is now stable.
2) I guess an oscillator fault does not change SELREF bit  setting in register, even the reference clock is switched to REFO. 
So SELREF bit is still 000b(XT1CLK).
To configure FLL reference clock manually, SELREF bit should be set 000b again?

Thanks and regards,
Koichiro Tashiro