Part Number: MSP430FR2433
Hi,
We use an external quartz (32.768K) in our design based on a MSP430FR2433. I try to set the current provided to the quartz, after leaving LPM3 or LPM4 mode, but I don't understand when to do it.
In SLAU445I:
1.4.3.4 Wake up from LPM4.5
Do the following steps after a wakeup from LPM4.5:
[...]
If a crystal oscillator is needed after a wakeup from LPM4.5 then configure the corresponding pins and start the oscillator after you cleared the LOCKLPM5 bit.
=> I understand I have to configure XT1DRIVE after clearing LOCKLPM5 bit
But, in CSCTL6 Register description of XT1DRIVE:
Initially, it starts with the highest supply current for reliable and quick startup. If needed, user software can reduce the drive strength.
=> I understand I have to configure XT1DRIVE after the initialization code (provided below):
The configuration of these bits is retained during LPM3.5 until LOCKLPM5 is cleared, but not the register bits itself; therefore, reconfiguration is required after wakeup from LPM3.5 and before clearing LOCKLPM5.
=> I understand I have to set XT1DRIVE before clearing LOCKLPM5 bit 
I tried to configure it before and after clearing LOCKLPM5 but I don't see differences in clock regularity (when using Timer0), even if I set the most constrained value XT1DRIVE_0 (3.7pF is not adapted to our hardware). So I think I missed one point, but don't see what.
Thanks,
Sylvain
Note: XT1 initialization code;
// Initialize XT1 32kHz crystal so that RTC can use it
P2SEL0 |= QUARTZ_32K_PINP2; // set XT1 pin as second function
do
{
CSCTL7 &= ~(XT1OFFG | DCOFFG); // Clear XT1 and DCO fault flag
SFRIFG1 &= ~OFIFG;
} while (SFRIFG1 & OFIFG); // Test oscillator fault flag
