MSP430F5437A: Baud rate change by UCBRSx

For 5xx UART setup can be used attached calculator...

3833.MSP430UartCalc.zip

Hi zrno soli,

Thanks for the quick reply.

I believe the register settings are correct from the calculator below, but we are trying to make minor adjustments on the FR5992 side.
https://software-dl.ti.com/msp430/msp430_public_sw/mcu/msp430/MSP430BaudRateConverter/index.html

[F5437A:USCI]
BRCLK :32768Hz
UCBRx=0x03
UCBRSx =0x03

[FR5992:eUSCI]
BRCLK=32768Hz
UCBRx=0x03
UCBRSx=0x92
UCBRFx=0x00

Best regards,
O.H

When using that particular combination of two MSP430's communicating at 9600bps derived from a 32KHz clock it is critical that they use the exact same modulation pattern.

UCBRS determines that pattern. The recommended value is 0x92 so the fr5992 is correct while the f5437 is wrong. You can of course use the same wrong setting on the fr5992 which should enable the two to communicate with each other. But if you use the same settings for some other device, expect trouble.

Hi David Schultz,

Thank you for your response. I understood that FR5992 is correct as an assumption.

However, in this case, we need to change the setting on the F992 side (in this case, intentionally wrong setting) for the customer's convenience. For this reason, I have two questions, one is to find the current frequency from the UCBRSx value on the USCI (F5437A) side, and the other is to know the change in frequency when the UCBRSx value is adjusted on the eUSCI (FR5992) side.

Best regards,
O.H

The modulation patterns and what happens is well described in the guide. See 30.3.9

I checked "guide. see 30.3.9 "UART Baud-Rate Generation". Please correct me if my understanding is incorrect.

I think "30.3.9.1 Low-Frequency Baud-Rate Generation" is applicable since oversampling mode is not used. I understood that UCBRSx increases the corresponding bit ("Table 30-2. Modulation Pattern Examples") by 1 RBCK and fine-tunes the baud rate. However, from "Table 30-4: UCBRSx Settings for Fractional Portion of N = fBRCLK/Baud Rate", I could not confirm the adjustment value when UCBRSx = 0x03. For example, UCBRSx=0x01->0.0529, UCBRSx0x10:0->0.1252,but UCBRSx=0x11->0.1670, so I don't think the calculations match with simple addition. (UCBRSx = 0x01 + 0x02->0.0529 + 0.0715 = 0.1244 is wrong)

In conclusion, am I correct in thinking that by adjusting UCBRSx=0x03 on the MSP430FR5992 side this time, the baud rate will theoretically be the same?

Going back to my original question, is there any problem with using a value that is not listed in "Table 30-4. UCBRSx Settings for Fractional Portion of N = fBRCLK/Baud Rate"?

If you cannot disclose the information when UCBRSx=0x03, it would be helpful if you could tell us why. Also, we will actually check the operation when UCBRSx=0x03 and contact you again with the results.

Best regards,
O.H

You still seem to be missing the point. With UCBRS=3 the bit period for the last two bits is increased by one cycle of the reference clock. (32KHz).

You can of course use any modulation pattern you like but with the large errors from deriving 9600bps from 32KHz, the two MSP430's must use the same pattern.

Thanks for the reply.

As you say, the error rate is high when using 9600 from 32768Hz to begin with, which seems to be the reason for the communication error like this.

If we want to match the modulation pattern with UCBRSx=0x03 (0010 1010) on the F5437A side, set UCBRSx=0x2A (0010 1010) on the FR5992 side. If the above settings do not improve the problem, I would try raising the BRCK of FR5992 to 4MHz/8MHz/16MHz and using 9600.

If the approach is not appropriate, we would appreciate it if you could point out the problem.

Best regards,
O.H

It looks like you have reversed the bit order of UCBRS for the fr5992.