MSP430FR5994: Implementing two ADC inputs

Oscar Ip

Part Number: MSP430FR5994

Hi. I'm trying to implement an input where I have two ADC inputs from two different voltage sources. I'm starting out by working with the basic ADC code with one input, but I am unable to find the documentation or sample code that lets me conduct a dual ADC input.

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#include <msp430.h>
#include <stdio.h>
int main(void)
{
    WDTCTL = WDTPW | WDTHOLD;               // Stop WDT
    // GPIO Setup
    P1OUT &= ~BIT0;                         // Clear LED to start
    P1DIR |= BIT0;                          // Set P1.0/LED to output
    P1SEL1 |= BIT2 | BIT3 ;                 // Configure P1.2 and P1.3 for ADC input (See p369, p88 of specific for pin config details.)
    P1SEL0 |= BIT2 | BIT3 ;                 // There are two Pin Select bits (p88_s)
    // Disable the GPIO power-on default high-impedance mode to activate
    // previously configured port settings (p92)
    PM5CTL0 &= ~LOCKLPM5;
    // Configure ADC12
    ADC12CTL0 = ADC12SHT0_2 | ADC12ON;      // Sampling time, S&H=16, ADC12 on [p893, CTL0 = control 0, SHT0_2 = sample & hold time, knowledge of register value from p88_s]
    ADC12CTL1 = ADC12SHP;                   // Use sampling timer [p895, Sampler uses sampling timer (not sure what that is yet)]
    ADC12CTL2 |= ADC12RES_2;                // 12-bit conversion results [p897, RES means resolution, _2 means 12 bits]
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#include <msp430.h>
#include <stdio.h>

int main(void)
{
    WDTCTL = WDTPW | WDTHOLD;               // Stop WDT

    // GPIO Setup
    P1OUT &= ~BIT0;                         // Clear LED to start
    P1DIR |= BIT0;                          // Set P1.0/LED to output
    P1SEL1 |= BIT2 | BIT3 ;                 // Configure P1.2 and P1.3 for ADC input (See p369, p88 of specific for pin config details.)
    P1SEL0 |= BIT2 | BIT3 ;                 // There are two Pin Select bits (p88_s)

    // Disable the GPIO power-on default high-impedance mode to activate
    // previously configured port settings (p92)
    PM5CTL0 &= ~LOCKLPM5;

    // Configure ADC12
    ADC12CTL0 = ADC12SHT0_2 | ADC12ON;      // Sampling time, S&H=16, ADC12 on [p893, CTL0 = control 0, SHT0_2 = sample & hold time, knowledge of register value from p88_s]
    ADC12CTL1 = ADC12SHP;                   // Use sampling timer [p895, Sampler uses sampling timer (not sure what that is yet)]
    ADC12CTL2 |= ADC12RES_2;                // 12-bit conversion results [p897, RES means resolution, _2 means 12 bits]
    ADC12CTL3 |= ADC12CSTARTADD_2;          // Use MEM2/MCTL2
    ADC12MCTL2 |= ADC12INCH_2;              // A2 ADC input select; Vref=AVCC [MCTL2 = Memory Control 2 (p900), INCH = input channel, 2 means channel A2]
    ADC12MCTL3 |= ADC12INCH_3;
    ADC12IER0 |= ADC12IE2 | ADC12IE3;                  // Enable ADC conv complete interrupt [p903, means "interrupt enable register 0". Enables or disables the interrupt request for ADC12IFG2 bit]
    printf("Got here.\n");

    while (1)
    {
        printf("Got there.\n");
        __delay_cycles(5000);
        ADC12CTL0 |= ADC12ENC | ADC12SC;    // Start sampling/conversion [p893, ENC = enable conversion, SC = start conversion. difference between the two = idfk, but remember to have both set]

        __bis_SR_register(LPM0_bits | GIE); // LPM0, ADC12_ISR will force exit

       // printf("Got nowhere.\n");
        __no_operation();                   // For debugger
    }
}

#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector = ADC12_B_VECTOR
__interrupt void ADC12_ISR(void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(ADC12_B_VECTOR))) ADC12_ISR (void)
#else
#error Compiler not supported!
#endif
{
    switch(__even_in_range(ADC12IV, ADC12IV__ADC12RDYIFG))
    {
        case ADC12IV__NONE:        break;   // Vector  0:  No interrupt
        case ADC12IV__ADC12OVIFG:  break;   // Vector  2:  ADC12MEMx Overflow
        case ADC12IV__ADC12TOVIFG: break;   // Vector  4:  Conversion time overflow
        case ADC12IV__ADC12HIIFG:  break;   // Vector  6:  ADC12BHI
        case ADC12IV__ADC12LOIFG:  break;   // Vector  8:  ADC12BLO
        case ADC12IV__ADC12INIFG:  break;   // Vector 10:  ADC12BIN
        case ADC12IV__ADC12IFG0:            // Vector 12:  ADC12MEM0 Interrupt
            break;
        case ADC12IV__ADC12IFG1:   break;   // Vector 14:  ADC12MEM1
        case ADC12IV__ADC12IFG2:            // Vector 16:  ADC12MEM2
            if (ADC12MEM2 >= 0x7ff) {        // ADC12MEM2 = A1 > 0.5AVcc?
                P1OUT |= BIT0;  }            // P1.0 = 1
            else{
                P1OUT &= ~BIT0;  }           // P1.0 = 0
            printf("In MEM2.");
            int memval = ADC12MEM2;             // Memory stored in MEM2
            printf("%d\n", memval);
                // Exit from LPM0 and continue executing main
                __bic_SR_register_on_exit(LPM0_bits);
                break;
        case ADC12IV__ADC12IFG3:   break;   // Vector 18:  ADC12MEM3
        if (ADC12MEM3 >= 0x7ff) {
            P1OUT |= BIT0;  }
        else{
            P1OUT &= ~BIT0;  }
        printf("In MEM3.");
        int memval = ADC12MEM3;             // Memory stored in MEM3
        printf("%d\n", memval);
            // Exit from LPM0 and continue executing main
            __bic_SR_register_on_exit(LPM0_bits);
            break;
        case ADC12IV__ADC12IFG4:   break;   // Vector 20:  ADC12MEM4
        case ADC12IV__ADC12IFG5:   break;   // Vector 22:  ADC12MEM5
        case ADC12IV__ADC12IFG6:   break;   // Vector 24:  ADC12MEM6
        case ADC12IV__ADC12IFG7:   break;   // Vector 26:  ADC12MEM7
        case ADC12IV__ADC12IFG8:   break;   // Vector 28:  ADC12MEM8
        case ADC12IV__ADC12IFG9:   break;   // Vector 30:  ADC12MEM9
        case ADC12IV__ADC12IFG10:  break;   // Vector 32:  ADC12MEM10
        case ADC12IV__ADC12IFG11:  break;   // Vector 34:  ADC12MEM11
        case ADC12IV__ADC12IFG12:  break;   // Vector 36:  ADC12MEM12
        case ADC12IV__ADC12IFG13:  break;   // Vector 38:  ADC12MEM13
        case ADC12IV__ADC12IFG14:  break;   // Vector 40:  ADC12MEM14
        case ADC12IV__ADC12IFG15:  break;   // Vector 42:  ADC12MEM15
        case ADC12IV__ADC12IFG16:  break;   // Vector 44:  ADC12MEM16
        case ADC12IV__ADC12IFG17:  break;   // Vector 46:  ADC12MEM17
        case ADC12IV__ADC12IFG18:  break;   // Vector 48:  ADC12MEM18
        case ADC12IV__ADC12IFG19:  break;   // Vector 50:  ADC12MEM19
        case ADC12IV__ADC12IFG20:  break;   // Vector 52:  ADC12MEM20
        case ADC12IV__ADC12IFG21:  break;   // Vector 54:  ADC12MEM21
        case ADC12IV__ADC12IFG22:  break;   // Vector 56:  ADC12MEM22
        case ADC12IV__ADC12IFG23:  break;   // Vector 58:  ADC12MEM23
        case ADC12IV__ADC12IFG24:  break;   // Vector 60:  ADC12MEM24
        case ADC12IV__ADC12IFG25:  break;   // Vector 62:  ADC12MEM25
        case ADC12IV__ADC12IFG26:  break;   // Vector 64:  ADC12MEM26
        case ADC12IV__ADC12IFG27:  break;   // Vector 66:  ADC12MEM27
        case ADC12IV__ADC12IFG28:  break;   // Vector 68:  ADC12MEM28
        case ADC12IV__ADC12IFG29:  break;   // Vector 70:  ADC12MEM29
        case ADC12IV__ADC12IFG30:  break;   // Vector 72:  ADC12MEM30
        case ADC12IV__ADC12IFG31:  break;   // Vector 74:  ADC12MEM31
        case ADC12IV__ADC12RDYIFG: break;   // Vector 76:  ADC12RDY
        default: break;
    }
}

My code so far. My ultimate objective is to collect the ADC information from these two voltage sources, subtract them, then collect the ADC information from the next sampling time (I'm planning a sampling time of 32Hz), subtract them two, and then compare these two ADC information. I am doing this to compare two demodulated FM signals, if that helps. Please let me know if more information is needed.

over 3 years ago

0 Oscar Ip over 3 years ago

Intellectual 260 points

I have found a solution:

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#include <msp430.h>
#include <stdio.h>
int main(void)
{
    WDTCTL = WDTPW | WDTHOLD;               // Stop WDT
    // GPIO Setup
    P1OUT &= ~BIT0;                         // Clear LED to start
    P1DIR |= BIT0;                          // Set P1.0/LED to output
    P1SEL1 |= BIT2 | BIT3 ;                 // Configure P1.2 and P1.3 for ADC input (See p369, p88 of specific for pin config details.)
    P1SEL0 |= BIT2 | BIT3 ;                 // There are two Pin Select bits (p88_s)
    // Disable the GPIO power-on default high-impedance mode to activate
    // previously configured port settings (p92)
    PM5CTL0 &= ~LOCKLPM5;
    printf("17\n");
    // Configure ADC12
    ADC12CTL0 = ADC12SHT0_2 | ADC12ON;      // Sampling time, S&H=16, ADC12 on [p893, CTL0 = control 0, SHT0_2 = sample & hold time, knowledge of register value from p88_s]
    ADC12CTL1 = ADC12SHP | ADC12CONSEQ_1;   // Use sampling timer [p895, Sampler uses sampling timer (not sure what that is yet)]
    ADC12CTL2 |= ADC12RES_2;                // 12-bit conversion results [p897, RES means resolution, _2 means 12 bits]
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#include <msp430.h>
#include <stdio.h>

int main(void)
{
    WDTCTL = WDTPW | WDTHOLD;               // Stop WDT

    // GPIO Setup
    P1OUT &= ~BIT0;                         // Clear LED to start
    P1DIR |= BIT0;                          // Set P1.0/LED to output
    P1SEL1 |= BIT2 | BIT3 ;                 // Configure P1.2 and P1.3 for ADC input (See p369, p88 of specific for pin config details.)
    P1SEL0 |= BIT2 | BIT3 ;                 // There are two Pin Select bits (p88_s)

    // Disable the GPIO power-on default high-impedance mode to activate
    // previously configured port settings (p92)
    PM5CTL0 &= ~LOCKLPM5;
    printf("17\n");
    // Configure ADC12
    ADC12CTL0 = ADC12SHT0_2 | ADC12ON;      // Sampling time, S&H=16, ADC12 on [p893, CTL0 = control 0, SHT0_2 = sample & hold time, knowledge of register value from p88_s]
    ADC12CTL1 = ADC12SHP | ADC12CONSEQ_1;   // Use sampling timer [p895, Sampler uses sampling timer (not sure what that is yet)]
    ADC12CTL2 |= ADC12RES_2;                // 12-bit conversion results [p897, RES means resolution, _2 means 12 bits]
    ADC12CTL3 |= ADC12CSTARTADD_2;          // Use MEM2/MCTL2
    ADC12MCTL2 |= ADC12INCH_2;              // A2 ADC input select; Vref=AVCC [MCTL2 = Memory Control 2 (p900), INCH = input channel, 2 means channel A2]
    ADC12MCTL3 |= ADC12INCH_3;
    ADC12IER0 |= ADC12IE2 | ADC12IE3;       // Enable ADC conv complete interrupt [p903, means "interrupt enable register 0". Enables or disables the interrupt request for ADC12IFG2 bit]
    printf("Got here.\n");

    while (1)
    {
        printf("Got there.\n");
        __delay_cycles(5000);
        ADC12MCTL3 ^= ADC12EOS;
        ADC12CTL0 |= ADC12ENC | ADC12SC;    // Start sampling/conversion [p893, ENC = enable conversion, SC = start conversion. difference between the two = idfk, but remember to have both set]

        __bis_SR_register(LPM0_bits | GIE); // LPM0, ADC12_ISR will force exit

       // printf("Got nowhere.\n");
        __no_operation();                   // For debugger
    }
}

#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector = ADC12_B_VECTOR
__interrupt void ADC12_ISR(void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(ADC12_B_VECTOR))) ADC12_ISR (void)
#else
#error Compiler not supported!
#endif
{
    switch(__even_in_range(ADC12IV, ADC12IV__ADC12RDYIFG))
    {
        case ADC12IV__NONE:        break;   // Vector  0:  No interrupt
        case ADC12IV__ADC12OVIFG:  break;   // Vector  2:  ADC12MEMx Overflow
        case ADC12IV__ADC12TOVIFG: break;   // Vector  4:  Conversion time overflow
        case ADC12IV__ADC12HIIFG:  break;   // Vector  6:  ADC12BHI
        case ADC12IV__ADC12LOIFG:  break;   // Vector  8:  ADC12BLO
        case ADC12IV__ADC12INIFG:  break;   // Vector 10:  ADC12BIN
        case ADC12IV__ADC12IFG0:            // Vector 12:  ADC12MEM0 Interrupt
            break;
        case ADC12IV__ADC12IFG1:   break;   // Vector 14:  ADC12MEM1
        case ADC12IV__ADC12IFG2:            // Vector 16:  ADC12MEM2
            if (ADC12MEM2 >= 0x7ff) {       // ADC12MEM2 = A1 > 0.5AVcc?
                P1OUT |= BIT0;  }           // P1.0 = 1
            else{
                P1OUT &= ~BIT0;  }          // P1.0 = 0
            printf("In MEM2.\n");
            int memval2 = ADC12MEM2;         // Memory stored in MEM2
            printf("%d\n", memval2);
                // Exit from LPM0 and continue executing main
                __bic_SR_register_on_exit(LPM0_bits);
                break;
        case ADC12IV__ADC12IFG3:            // Vector 18:  ADC12MEM3
            if (ADC12MEM3 >= 0x7ff) {
                P1OUT |= BIT0;  }
            else{
                P1OUT &= ~BIT0;  }
            printf("In MEM3.\n");
            int memval3 = ADC12MEM3;             // Memory stored in MEM3
            ADC12MCTL3 |= ADC12EOS;         // Needed to signal an end of sequence.
            printf("%d\n", memval3);
                // Exit from LPM0 and continue executing main
                __bic_SR_register_on_exit(LPM0_bits);
                break;
        case ADC12IV__ADC12IFG4:   break;   // Vector 20:  ADC12MEM4
        case ADC12IV__ADC12IFG5:   break;   // Vector 22:  ADC12MEM5
        case ADC12IV__ADC12IFG6:   break;   // Vector 24:  ADC12MEM6
        case ADC12IV__ADC12IFG7:   break;   // Vector 26:  ADC12MEM7
        case ADC12IV__ADC12IFG8:   break;   // Vector 28:  ADC12MEM8
        case ADC12IV__ADC12IFG9:   break;   // Vector 30:  ADC12MEM9
        case ADC12IV__ADC12IFG10:  break;   // Vector 32:  ADC12MEM10
        case ADC12IV__ADC12IFG11:  break;   // Vector 34:  ADC12MEM11
        case ADC12IV__ADC12IFG12:  break;   // Vector 36:  ADC12MEM12
        case ADC12IV__ADC12IFG13:  break;   // Vector 38:  ADC12MEM13
        case ADC12IV__ADC12IFG14:  break;   // Vector 40:  ADC12MEM14
        case ADC12IV__ADC12IFG15:  break;   // Vector 42:  ADC12MEM15
        case ADC12IV__ADC12IFG16:  break;   // Vector 44:  ADC12MEM16
        case ADC12IV__ADC12IFG17:  break;   // Vector 46:  ADC12MEM17
        case ADC12IV__ADC12IFG18:  break;   // Vector 48:  ADC12MEM18
        case ADC12IV__ADC12IFG19:  break;   // Vector 50:  ADC12MEM19
        case ADC12IV__ADC12IFG20:  break;   // Vector 52:  ADC12MEM20
        case ADC12IV__ADC12IFG21:  break;   // Vector 54:  ADC12MEM21
        case ADC12IV__ADC12IFG22:  break;   // Vector 56:  ADC12MEM22
        case ADC12IV__ADC12IFG23:  break;   // Vector 58:  ADC12MEM23
        case ADC12IV__ADC12IFG24:  break;   // Vector 60:  ADC12MEM24
        case ADC12IV__ADC12IFG25:  break;   // Vector 62:  ADC12MEM25
        case ADC12IV__ADC12IFG26:  break;   // Vector 64:  ADC12MEM26
        case ADC12IV__ADC12IFG27:  break;   // Vector 66:  ADC12MEM27
        case ADC12IV__ADC12IFG28:  break;   // Vector 68:  ADC12MEM28
        case ADC12IV__ADC12IFG29:  break;   // Vector 70:  ADC12MEM29
        case ADC12IV__ADC12IFG30:  break;   // Vector 72:  ADC12MEM30
        case ADC12IV__ADC12IFG31:  break;   // Vector 74:  ADC12MEM31
        case ADC12IV__ADC12RDYIFG: break;   // Vector 76:  ADC12RDY
        default: break;
    }
}

I needed to set the CONSEQ bits to 01 which change the mode of operation to sequence of channel mode (explained in p879), and set the ADC12EOS bit to 1 at the MEM3 interrupt (line 79, explained in p900). This bit needs to be toggled off every time the code is reactivated or the sequence will stop.

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MSP430FR5994: Implementing two ADC inputs