MSP430FR2311: Problem of code conversion between 2 MSP430

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//***************************************************************************************
//  MSP430FR24xx Demo - Timer0_A3 Capture of ACLK
//
//  Description: Capture a number of periods of the ACLK clock and store them in an array.
//  When the set number of periods is captured the program is trapped and the LED on
//  P1.0 is toggled. At this point halt the program execution read out the values using
//  the debugger.
//  ACLK = REFOCLK = 32kHz, MCLK = SMCLK = default DCODIV = 1MHz.
//
//                MSP430FR2433
//             -----------------
//         /|\|                 |
//          | |             P1.2|<-- TA0.CCI2A
//          --|RST              |  |
//            |             P2.2|--> ACLK
//            |                 |
//            |             P1.0|-->LED
//
//
//  Wei Zhao
//  Texas Instruments Inc.
//  Jan 2014
//  Built with IAR Embedded Workbench v6.20 & Code Composer Studio v6.0.1
//***************************************************************************************
#include <msp430.h>

#define NUMBER_TIMER_CAPTURES        20

volatile unsigned int timerAcaptureValues[NUMBER_TIMER_CAPTURES];
unsigned int timerAcapturePointer = 0;

int main(void)
{
    WDTCTL = WDTPW | WDTHOLD;                       // Stop watchdog timer

    // Configure GPIO
    P1DIR |= BIT0;                                  // Set P1.0 as output
    P1OUT |= BIT0;                                  // P1.0 high
    P1SEL1 |= BIT2;                                 // TA0.CCI2A input capture pin, second function
    P1REN |= BIT2;                                  // enable internal pull-down resistor
    P1OUT &= ~BIT2;

    P2SEL1 |= BIT2;                                 // Set as ACLK pin, second function
    P2DIR |= BIT2;

    // Disable the GPIO power-on default high-impedance mode to activate
    // previously configured port settings
    PM5CTL0 &= ~LOCKLPM5;

    // Configure clock
    __bis_SR_register(SCG0);                        // disable FLL
    CSCTL3 |= SELREF__REFOCLK;                      // Set REFO as FLL reference source
    CSCTL0 = 0;                                     // clear DCO and MOD registers
    CSCTL1 &= ~(DCORSEL_7);                         // Clear DCO frequency select bits first
    CSCTL1 |= DCORSEL_2;                            // Set DCO = 4MHz
    CSCTL2 = FLLD_1 + 60;                           // DCODIV = 2MHz
    __delay_cycles(3);
    __bic_SR_register(SCG0);                        // enable FLL
    while(CSCTL7 & (FLLUNLOCK0 | FLLUNLOCK1));      // Poll until FLL is locked

    CSCTL4 = SELMS__DCOCLKDIV | SELA__REFOCLK;      // set default REFO(~32768Hz) as ACLK source, ACLK = 32768Hz
                                                    // default DCODIV as MCLK and SMCLK source
    CSCTL5 |= DIVM__1 | DIVS__2;                    // SMCLK = 1MHz, MCLK = 2MHz

    // Timer0_A3 Setup
    TB0CCTL2 |= CM_1 | CCIS_0 | CCIE | CAP | SCS;
                                                    // Capture rising edge,
                                                    // Use CCI2A=ACLK,
                                                    // Synchronous capture,
                                                    // Enable capture mode,
                                                    // Enable capture interrupt

    TB0CTL |= TBSSEL_2 | MC_2 | TBCLR;              // Use SMCLK as clock source, clear TA0R
                                                    // Start timer in continuous mode

    __bis_SR_register(LPM0_bits | GIE);
    __no_operation();
}

// Timer0_A3 CC1-2, TA Interrupt Handler
#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector = TIMER0_B1_VECTOR
__interrupt void TIMER0_B1_ISR(void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(TIMER0_B1_VECTOR))) TIMER0_B1_ISR (void)
#else
#error Compiler not supported!
#endif
{
    switch(__even_in_range(TB0IV,TB0IV_TBIFG))
    {
        case TB0IV_NONE:
            break;                                  // No interrupt
        case TB0IV_TBCCR1:
            break;                                  // CCR1 not used
        case TB0IV_TBCCR2:
            timerAcaptureValues[timerAcapturePointer++] = TB0CCR2;
            if (timerAcapturePointer >= 20)
            {
                while (1)
                {
                    P1OUT ^= 0x01;                  // Toggle P1.0 (LED)
                    __delay_cycles(100000);
                }
            }
            break;                                  // CCR2 not used
        case TB0IV_TBIFG:
            break;                                  // overflow
        default:
            break;
    }
}