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MSP430 32kHz clock - layout question

Lo
Expert 3020 points


Hello,

in this application the 32kHz clock is monitored by the oscillation error logic. The surrounding environment has strong electromagnetic fields/pulses, sometimes the oscillation error logic triggers due to missing clock pulses (but the clock resumes quite fast, measured on ACLK pin).

Should there be a ground plane below the crystal or better no ground plane? Any other layout issues that would improve robustness?

 

Regards,

Lo

  • 0
    TI__Genius 17960 points

    Hello,

    please take a look at the slaa322 32kHz oscillator application report. There are some useful hints on layout designs.

    Some top level recommendations:

    - exclusive GND for the 32kHz signals

    - short connections between crystal, load capacitors and MSP430 pins

    - keep away disturbing signals (LCD lines, clocks, PWMs...)

    Please see further details in the mentioned document.

    Beyond the layout, you can furthermore consider using crystals with higher load capacitance or/and increase drive level of the oscillator. (! make sure the safety margin stays in sufficient range with higher load capacitance)

    Best regards

    Peter

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