MSP430G2553: Watchdog reset MCU on timeout

Example msp430g2xx3_wdt_07.c is perhaps more illustrative. It shows the CPU-reset (PUC) part, but not the feeding part:

https://dev.ti.com/tirex/explore/node?node=AEBlR0c40D8-.JOaN5u6sQ__IOGqZri__LATEST

1) Generally the watchdog is fed using the same value that was used to start it (including WDTCNTCL in both cases). In this Example it would be

>  WDTCTL = WDT_MRST_32;                       // ~32ms interval (default)

2) This Example also illustrates the collection of pre-packaged WDTCTL values provided by CCS. Once you see the naming convention, they can save you some time digging through the bits [Ref User Guide (SLAU144J) Sec 10.3.1].

May, 

I should have made this more clear but you want to make sure you are in watchdog mode if you want the time out reset functionality. 

This is the bit 4 of WDTCTL register, WDTTMSEL which is in the example Bruce provided. 

regards, 

Henok