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UART BSL for 55XX

Other Parts Discussed in Thread: MSP430F5524

I've been able to build, flash and load an image using the UART_BSL code supplied from TI on an MSP430F5524. It doesn't work exactly as I'd expect when I compare it to the ROM based UART_BSL on the F2XXX series. After entering test mode using the documented sequence (Toggle TEST line twice and release RST during the second toggle) a delay of about 40ms is required before sending in the first UART command. Is that delay expected? Is that delay documented somewhere and is it different depending on the chip? I'm planning to migrate our product from the 5524 to the 5324 and I want to use the exact same procedure if possible.

  • Hi,

       You are correct, the 5xx and 2xx BSLs, though similar, have substantial differences.  The 5xx UART devices will probably require a longer delay due to setting up the clock system, and also to the RAM erase.  The RAM erase will vary based on device family:  On startup, the standard BSL erases all RAM which is shared within a family, but this can be customized to your individual device.

       I do not believe device specific startup delays are documented, however this delay can never be 'too long', since all devices simply wait for a command after invoke.  So making a very long delay (100+ms) should cover most all devices.

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