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Good Morning,
I am working on a project in which the CC430 acts as a calibration controller for the XTR108 chip. The XTR108 is TI's RTD Signal Conditioning. I am very close to finishing this project and have one final major ( make or break) stumbling block. The problem is with the SPI communications with the XTR108 and also the SPI communications with the non-volatile EEPROM that is attached to the XTR108.
The XTR108 has 15 registers. Registers 4-15 are the ones that need to be written to. These registers are the ones that contain the constants for the calibration in the XTR108. The communications begins with an active low CS, and uses a 3 wire setup. Data is read in byte by byte and placed in consecutive memory locations. The first packet signifies which Register Address to begin the write into, then all subsequent packets are placed consecutively byte by byte. The XTR108 also communicates to an attached EEPROM, writing directly to the EEPROM, this occurs by spending a special 0x7F instruction to the XTR108 which in turn will assert the ~CS2 line to allow communications with EEPROM.
With that being said I still do not have any of this communications working so I am posting my code and hoping one of the more talented programmers is able to help me out. I dont even know if communications is opening up with the XTR108.
// SPI Initialization Sequence-------------------------------------------------//
PMAPPWD = 0x02D52; // Get write-access to port mapping regs
P2MAP0 = PM_UCA0SIMO; // Map UCA0SIMO output to P2.0
P2MAP2 = PM_UCA0SOMI; // Map UCA0SOMI output to P2.2
P2MAP4 = PM_UCA0CLK; // Map UCA0CLK output to P2.4
PMAPPWD = 0; // Lock port mapping registers
//P1OUT |= BIT2; // Set P1.0 for LED
// Set P1.2 for slave reset
P1DIR |= BIT1 + BIT0; // Set P1.0, P1.2 to output direction
P2DIR |= BIT0 + BIT2 + BIT4; // ACLK, MCLK, SMCLK set out to pins
P2SEL |= BIT0 + BIT2 + BIT4; // P2.0,2,4 for debugging purposes.
UCA0CTL1 |= UCSWRST; // **Put state machine in reset**
UCA0CTL0 |= UCMST+UCSYNC+UCCKPL+UCMSB; // 3-pin, 8-bit SPI master
// Clock polarity high, MSB
UCA0CTL1 |= UCSSEL_2; // SMCLK
UCA0BR0 = 0x02; // /2
UCA0BR1 = 0; //
UCA0MCTL = 0; // No modulation
UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine**
UCA0IE |= UCRXIE; // Enable USCI_A0 RX interrupt
WriteXTR(); // Function call to write to xtr
WriteEEPROM(); // Function call to write to EEPROM
void CalcCRC(void)
{
XTRSum=0;
EESum=0;
for( int crc=4;crc<=15;crc++)
{
XTRSum = XTRSum+xtrregisters[crc];
if (XTRSum > 255)
{
XTRSum=XTRSum-255;
}
EESum = EESum+eeregisters[crc];
if (EESum > 255)
{
EESum=EESum-255;
}
}
xtrregisters[15]=255-XTRSum;
eeregisters[15]=255-EESum;
}
void WriteXTR(void)
{
P1OUT&=~0x04;
__delay_cycles(100);
while (!(UCA0IFG&UCTXIFG)); // USCI_A0 TX buffer ready?
UCA0TXBUF = xtrregisters[16]; // ADDRESS to Start Register
__delay_cycles(40);
for( int i=4;i<=15;i++)
{
while (!(UCA0IFG&UCTXIFG)); // USCI_A0 TX buffer ready?
UCA0TXBUF = xtrregisters[i]; //Various Registers to be written
__delay_cycles(40);
}
P1OUT|=0x04;
}
void WriteEEPROM(void)
{
// ~CS1 then 20ns delay for clock to start
P1OUT &= ~0x02;
__delay_cycles(75);
while (!(UCA0IFG&UCTXIFG)); // USCI_A0 TX buffer ready?
UCA0TXBUF = eeregisters[17]; // Special instruction to open comm with EEPROM
__delay_cycles(40);
while (!(UCA0IFG&UCTXIFG)); // USCI_A0 TX buffer ready?
UCA0TXBUF = eeregisters[16]; // Start Register Addres
__delay_cycles(40);
for( int i=4;i<=15;i++)
{
while (!(UCA0IFG&UCTXIFG)); // USCI_A0 TX buffer ready?
UCA0TXBUF = eeregisters[i]; //Various data to be written
__delay_cycles(40);
}
P1OUT |= 0x02;
}
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