Maximum baud rate for UART in MSP430F5437

The maximum baud rate supported by the USCI interface is 1MBd. However, this is not a 'standard' baudrate.

The calculated error in the table IMHO shows the error for a perfect clock (based on the fact that even the best clock won't always be an integer multiple of the desired baudrate)
However, the clock error and drift will add to it, either enlarging or reducing the effective error.

The uncalibrated, unadjusted DCO is often too far off to provide a reliable UART (RS232) connection. In I2C or SPI mode, however, the baudrate isn't a problem since the clock is provided with the data (synchronous transfers). Here th emaximum baudrate can go as high as the system clock (SPI master) or 1/2 of the system clock (I2C). And it makes no difference if it is more or less than expected, as long as it is not too high for the slave device.

Personally, I had good results with 115200Bd with an FLL-trimmed DCO based on the MSP430F5438 internal REFO clock. But maybe I was just lucky with the two devices I tested.

You can, however, rone a calibration software on each chip that calculates the optimum settings based on a temporarily attached precicsion clock source. After this calibration, the DCO (except for thermal drift) will be as good as a crystal for this job.

I seem to remember that when I was running serial communications from the REFO clock, the thermal drift was noticable.  I found 57600Bd was stable at room temperature, but would be cautious if the target application had to operate over a wide temperature range.  I didn't try 115200Bd as our application didn't require it.  As the application I am working on had a 32,768Hz crystal clock available I opted to use that and, therefore, haven't accumulated a huge amount of experience of the REFO clock.

On a MSP430F2xxx device I have managed to use the internal oscillator to communicate reliably over a wide temperature range by frequency locking to the incoming data.  It may be possible to use the same technique to stabilise the DCO, or trim the baudrate divisor.  This does require the other end of the link to transmit something first and may well have unintended consequences if both ends of the link were trying to synchronise with each other.

Regards

Phil

The USCI device has a built-in feature to auto-calculate the baudrate divider based on an incoming 'magic sync packet'.

However, if you connect the RX pin and TX pin to pins that have a CCR unit attached, you can use this to calculate the distance of two rising edges and try to fine-tune the baudrate divider.

And you're right: if both sides try to do it, you might end up with 0Bd or 1MHz baudrate.

Hi,

Regarding the UART baud using internal DCO.

Our customer is using MSP430G2553 which has factory calibrated DCO(1,8,12 and 16MHz).

Without using an external 32K crystal, will be a safer to use Calibrated DCO to 

for the baud rate greater than 115200?

Should we go for 32K crystal as a safer side.

Regards.

Mudigere.

There are two different sources ofbaudrate error.

When using the DCO, the problem is the precision of the DCO. Even the calibrated values have an error >1% across temperature and supply voltage.

When using the crystal, teh problem is the low clock speed. Your maximum resolution is 1/f, so the minimum step size for the baudrate in 1/32768s. The error may be more stable and predictable, but it isn't smaller: a bit change can only happen every 1/32768s, which is maybe far off the ideal point.

The values in the users guide show the error rates with an ideal clock source (0% error). You'll see that the results for a highsped clock are far better. But then, sicn ethe highspeed clock is the DCO, you must add teh constant (or even changing) error of the DCO to this ideal value. Which one gives the better end result depends on the situation.